P

Inventor

PRASKY BRIAN ROBERT

US21 patents
⚠️ This page may combine multiple inventors who share the name “PRASKY BRIAN ROBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

20 patents
US7676663B2Mar 9, 2010

Method, system and program product for pipelined processor having a branch target buffer (BTB) table with a recent entry queue in parallel with the BTB table

IBM9 citations82
US11573899B1Feb 7, 2023

Transparent interleaving of compressed cache lines

IBM2 citations73
US11556474B1Jan 17, 2023

Integrated semi-inclusive hierarchical metadata predictor

IBM5 citations72
US11235224B1Feb 1, 2022

Detecting and removing bias in subjective judging

IBM4 citations70
US11163573B2Nov 2, 2021

Hierarchical metadata predictor with periodic updates

IBM2 citations68
US12066935B2Aug 20, 2024

Cache line compression prediction and adaptive compression

IBM0 citations62
US11797446B2Oct 24, 2023

Multi purpose server cache directory

IBM0 citations62
US11782919B2Oct 10, 2023

Using metadata presence information to determine when to access a higher-level metadata table

IBM1 citations60
US10977040B2Apr 13, 2021

Heuristic invalidation of non-useful entries in an array

IBM1 citations60
US7747845B2Jun 29, 2010

State machine based filtering of non-dominant branches to use a modified gshare scheme

IBM4 citations60
US11928471B2Mar 12, 2024

Metadata predictor

IBM0 citations59
US11868779B2Jan 9, 2024

Updating metadata prediction tables using a reprediction pipeline

IBM1 citations58
US11847022B2Dec 19, 2023

Computation and placement of error correcting codes (ECC) in a computing system data cache

IBM0 citations52
US12014182B2Jun 18, 2024

Variable formatting of branch target buffer

IBM0 citations50
US11182165B2Nov 23, 2021

Skip-over offset branch prediction

IBM0 citations50
US10990405B2Apr 27, 2021

Call/return stack branch target predictor to multiple next sequential instruction addresses

IBM0 citations50
US12327122B2Jun 10, 2025

Branch prediction using speculative indexing and intraline count

IBM0 citations49
US12547408B2Feb 10, 2026

Multi-level PHT entry swaps based on first level miss and second level hit

IBM0 citations48
US11663126B1May 30, 2023

Return address table branch predictor

IBM0 citations48
US12585650B2Mar 24, 2026

Determining an optimal path to search a branch target buffer

IBM0 citations47

BURCEA IOANA MONICA

1 patent