P

Inventor

HEIRMAN WIM

BE16 patents
⚠️ This page may combine multiple inventors who share the name “HEIRMAN WIM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

15 patents
US10929132B1Feb 23, 2021

Systems and methods for ISA support for indirect loads and stores for efficiently accessing compressed lists in graph applications

INTEL CORP8 citations80
US10684858B2Jun 16, 2020

Indirect memory fetcher

INTEL CORP2 citations70
US10394678B2Aug 27, 2019

Wait and poll instructions for monitoring a plurality of addresses

INTEL CORP2 citations69
US10303609B2May 28, 2019

Independent tuning of multiple hardware prefetchers

INTEL CORP2 citations69
US12572417B2Mar 10, 2026

Translation cache and configurable ECC memory for reducing ECC memory overhead

INTEL CORP0 citations62
US12333305B2Jun 17, 2025

Delayed cache writeback instructions for improved data sharing in manycore processors

INTEL CORP0 citations60
US12050915B2Jul 30, 2024

Instruction and logic for code prefetching

INTEL CORP0 citations60
US11256626B2Feb 22, 2022

Apparatus, method, and system for enhanced data prefetching based on non-uniform memory access (NUMA) characteristics

INTEL CORP0 citations59
US10489297B2Nov 26, 2019

Prefetching time allocation

INTEL CORP1 citations59
US12585394B2Mar 24, 2026

Visualizing memory bandwidth utilization using memory bandwidth stack

INTEL CORP0 citations50
US12111772B2Oct 8, 2024

Device, system and method for selectively dropping software prefetch instructions

INTEL CORP0 citations50
US10942851B2Mar 9, 2021

System, apparatus and method for dynamic automatic sub-cacheline granularity memory access control

INTEL CORP0 citations49
US10621099B2Apr 14, 2020

Apparatus, method, and system for enhanced data prefetching based on non-uniform memory access (NUMA) characteristics

INTEL CORP0 citations48
US10289516B2May 14, 2019

NMONITOR instruction for monitoring a plurality of addresses

INTEL CORP0 citations48
US10877886B2Dec 29, 2020

Storing cache lines in dedicated cache of an idle core

INTEL CORP0 citations36

UNIV GENT

1 patent