Inventor
YOAZ ADI
US32 patents
⚠️ This page may combine multiple inventors who share the name “YOAZ ADI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
28 patentsUS6505293B1Jan 7, 2003
Register renaming to optimize identical register values
INTEL CORP98 citations98
US6697932B1Feb 24, 2004
System and method for early resolution of low confidence branches and safe data cache accesses
INTEL CORP92 citations97
US6134643AOct 17, 2000
Method and apparatus for cache line prediction and prefetching using a prefetch controller and buffer and access history
INTEL CORP111 citations97
US6625723B1Sep 23, 2003
Unified renaming scheme for load and store instructions
INTEL CORP68 citations96
US5987595ANov 16, 1999
Method and apparatus for predicting when load instructions can be executed out-of order
INTEL CORP68 citations96
US7062638B2Jun 13, 2006
Prediction of issued silent store operations for allowing subsequently issued loads to bypass unexecuted silent stores and confirming the bypass upon execution of the stores
INTEL CORP25 citations93
US7017026B2Mar 21, 2006
Generating lookahead tracked register value based on arithmetic operation indication
INTEL CORP15 citations92
US6857060B2Feb 15, 2005
System, apparatus and method for prioritizing instructions and eliminating useless instructions
INTEL CORP29 citations92
US6694421B2Feb 17, 2004
Cache memory bank access prediction
INTEL CORP15 citations92
US6516405B1Feb 4, 2003
Method and system for safe data dependency collapsing based on control-flow speculation
INTEL CORP16 citations92
US5838941ANov 17, 1998
Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers
INTEL CORP32 citations91
US5822788AOct 13, 1998
Mechanism for prefetching targets of memory de-reference operations in a high-performance processor
INTEL CORP33 citations90
US6757816B1Jun 29, 2004
Fast branch misprediction recovery method and system
INTEL CORP23 citations89
US7219207B2May 15, 2007
Reconfigurable trace cache
INTEL CORP11 citations80
US6742112B1May 25, 2004
Lookahead register value tracking
INTEL CORP11 citations74
US10915421B1Feb 9, 2021
Technology for dynamically tuning processor features
INTEL CORP4 citations72
US10754655B2Aug 25, 2020
Automatic predication of hard-to-predict convergent branches
INTEL CORP2 citations71
US7284116B2Oct 16, 2007
Method and system for safe data dependency collapsing based on control-flow speculation
INTEL CORP2 citations63
US11656971B2May 23, 2023
Technology for dynamically tuning processor features
INTEL CORP0 citations62
US11645078B2May 9, 2023
Detecting a dynamic control flow re-convergence point for conditional branches in hardware
INTEL CORP0 citations62
US11256599B2Feb 22, 2022
Technology for dynamically tuning processor features
INTEL CORP0 citations62
US6950928B2Sep 27, 2005
Apparatus, method and system for fast register renaming using virtual renaming, including by using rename information or a renamed register
INTEL CORP6 citations62
US6880063B2Apr 12, 2005
Memory cache bank prediction
INTEL CORP4 citations62
US10719355B2Jul 21, 2020
Criticality based port scheduling
INTEL CORP1 citations61
US7802077B1Sep 21, 2010
Trace indexing via trace end addresses
INTEL CORP3 citations61
US7739483B2Jun 15, 2010
Method and apparatus for increasing load bandwidth
INTEL CORP2 citations60
US7644236B2Jan 5, 2010
Memory cache bank prediction
INTEL CORP0 citations51
US10467011B2Nov 5, 2019
Thread pause processors, methods, systems, and instructions
INTEL CORP0 citations41