Inventor
BEAUSOLEIL WILLIAM F
US32 patents
⚠️ This page may combine multiple inventors who share the name “BEAUSOLEIL WILLIAM F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS5551013AAug 27, 1996
Multiprocessor for hardware emulation
IBM615 citations97
US6051030AApr 18, 2000
Emulation module having planar array organization
IBM78 citations96
US5109496AApr 28, 1992
Most recently used address translation system with least recently used (LRU) replacement
IBM103 citations96
US6774475B2Aug 10, 2004
Vertically stacked memory chips in FBGA packages
IBM65 citations94
US6035117AMar 7, 2000
Tightly coupled emulation processors
IBM63 citations94
US5463754AOct 31, 1995
Shared direct access storage device for fixed block architecture devices
IBM72 citations93
US5564019AOct 8, 1996
Program storage device and computer program product for managing a shared direct access storage device with a fixed block architecture
IBM43 citations90
US4068304AJan 10, 1978
Storage hierarchy performance monitor
IBM35 citations89
US4078254AMar 7, 1978
Hierarchical memory with dedicated high speed buffers
IBM37 citations87
US4087794AMay 2, 1978
Multi-level storage hierarchy emulation monitor
IBM30 citations74
US4716546ADec 29, 1987
Memory organization for vertical and horizontal vectors in a raster scan display system
IBM8 citations70
US3987410AOct 19, 1976
Array logic fabrication for use in pattern recognition equipments and the like
IBM10 citations69
US4584574AApr 22, 1986
Information display and editing system
IBM4 citations63
US6491205B1Dec 10, 2002
Assembly of multi-chip modules using eutectic solders
IBM3 citations60
US4597051AJun 24, 1986
All points addressable printer/storage tube image copier system
IBM3 citations54
QUICKTURN DESIGN SYSTEMS INC
8 patentsUS6618698B1Sep 9, 2003
Clustered processors in an emulation engine
QUICKTURN DESIGN SYSTEMS INC105 citations96
US6901359B1May 31, 2005
High speed software driven emulator comprised of a plurality of emulation processors with a method to allow high speed bulk read/write operation synchronous DRAM while refreshing the memory
QUICKTURN DESIGN SYSTEMS INC14 citations82
US6850880B1Feb 1, 2005
High speed software driven emulator comprised of a plurality of emulation processors with an improved maintenance bus that streams data at high speed
QUICKTURN DESIGN SYSTEMS INC18 citations82
US7555423B2Jun 30, 2009
Emulation processor interconnection architecture
QUICKTURN DESIGN SYSTEMS INC4 citations62
US7107203B1Sep 12, 2006
High speed software driven emulator comprised of a plurality of emulation processors with improved board-to-board interconnection cable length identification system
QUICKTURN DESIGN SYSTEMS INC3 citations61
US7089538B1Aug 8, 2006
High speed software driven emulator comprised of a plurality of emulation processors with a method to allow memory read/writes without interrupting the emulation
QUICKTURN DESIGN SYSTEMS INC3 citations61
US7047179B2May 16, 2006
Clustered processors in an emulation engine
QUICKTURN DESIGN SYSTEMS INC4 citations61
US7043417B1May 9, 2006
High speed software driven emulator comprised of a plurality of emulation processors with improved multiplexed data memory
QUICKTURN DESIGN SYSTEMS INC3 citations61
CADENCE DESIGN SYSTEMS INC
3 patentsUS7904288B1Mar 8, 2011
Hardware emulator having a variable input emulation group
CADENCE DESIGN SYSTEMS INC9 citations81
US7725304B1May 25, 2010
Method and apparatus for coupling data between discrete processor based emulation integrated chips
CADENCE DESIGN SYSTEMS INC5 citations61
US7827023B2Nov 2, 2010
Method and apparatus for increasing the efficiency of an emulation engine
CADENCE DESIGN SYSTEMS INC4 citations60