Inventor

POTKONJAK MIODRAG

US80 patents

⚠️ This page may combine multiple inventors who share the name “POTKONJAK MIODRAG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

POTKONJAK MIODRAG

POTKONJAK MIODRAG

Energy optimization through intentional errors

Parking facility resource management

Secure authentication

Adaptive compression

Infrastructure for location discovery

Usage metering based upon hardware aging

Aging-based usage metering of components

Usage metering based upon hardware aging

Digital signatures

Combined-model data compression

Non-invasive timing characterization of integrated circuits using sensitizable signal paths and sparse equations

Voice to text to voice processing

Program and data annotation for hardware customization and energy optimization

Scheduling and/or organizing task execution for a target computing platform

Non-invasive leakage power device characterization of integrated circuits using device grouping and compressive sensing

Non-invasive leakage power device characterization of integrated circuits using device grouping and compressive sensing

Identification of integrated circuits

Autonomous, non-interactive, context-based services for cellular phone

Shared memories for energy efficient multi-core processors

EMPIRE TECHNOLOGY DEV LLC

Hardware based cryptography

Efficient location discovery

Lightweight secure physically unclonable functions

Autonomous, non-interactive, context-based services for cellular phone

Program and data annotation for hardware customization and energy optimization

Infrastructure for location discovery

Aging-based leakage energy reduction method and system

Hardware synthesis using thermally aware scheduling and binding

Testing security of mapping functions

Infrastructure for location discovery

Infrastructure for location discovery

Combined-model data compression

Efficient location discovery

Identification of integrated circuits

Controlling integrated circuits including remote activation or deactivation

Hardware synthesis using thermally aware scheduling and binding

NEC USA INC

High level circuit design synthesis using transformations

Non-scan design-for-testability of RT-level data paths

High level synthesis for partial scan testing

Behavioral synthesis for reconfigurable datapath structures

Eliminating retiming bottlenecks to improve performance of synchronous sequential VLSI circuits

KOUSHANFAR FARINAZ

Lightweight secure physically unclonable functions

Methods and systems of digital rights management for integrated circuits

LSI CORP

Decoder using a memory for storing state metrics implementing a decoder trellis

Decoder using a memory for storing state metrics implementing a decoder trellis

LSI LOGIC CORP

Design and optimization methods for integrated circuits

Multi-resolution Viterbi decoding technique

UNIV CALIFORNIA

Methods and systems for the identification of circuits and circuit designs

BECKMANN NATHAN

Differential uncloneable variability-based cryptography

TECHNOLOGY CURRENTS LLC

Network node location discovery

SARRAFZADEH MAJID

Energy aware sensor management for wearable medical systems optimization