Inventor
AULNETTE CECILE
FR26 patents
⚠️ This page may combine multiple inventors who share the name “AULNETTE CECILE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
21 patentsUS6955971B2Oct 18, 2005
Semiconductor structure and methods for fabricating same
SOITEC SILICON ON INSULATOR92 citations98
US7407867B2Aug 5, 2008
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
SOITEC SILICON ON INSULATOR19 citations92
US7018910B2Mar 28, 2006
Transfer of a thin layer from a wafer comprising a buffer layer
SOITEC SILICON ON INSULATOR30 citations92
US6991956B2Jan 31, 2006
Methods for transferring a thin layer from a wafer having a buffer layer
SOITEC SILICON ON INSULATOR23 citations92
US7008857B2Mar 7, 2006
Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
SOITEC SILICON ON INSULATOR16 citations91
US8367521B2Feb 5, 2013
Manufacture of thin silicon-on-insulator (SOI) structures
SOITEC SILICON ON INSULATOR8 citations84
US7459374B2Dec 2, 2008
Method of manufacturing a semiconductor heterostructure
SOITEC SILICON ON INSULATOR19 citations84
US7446019B2Nov 4, 2008
Method of reducing roughness of a thick insulating layer
SOITEC SILICON ON INSULATOR10 citations84
US7232488B2Jun 19, 2007
Method of fabrication of a substrate for an epitaxial growth
SOITEC SILICON ON INSULATOR10 citations84
US7256075B2Aug 14, 2007
Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer
SOITEC SILICON ON INSULATOR20 citations83
US9954139B2Apr 24, 2018
Multiple transfer assembly process
SOITEC SILICON ON INSULATOR7 citations82
US7078353B2Jul 18, 2006
Indirect bonding with disappearance of bonding layer
SOITEC SILICON ON INSULATOR8 citations74
US7375008B2May 20, 2008
Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
SOITEC SILICON ON INSULATOR6 citations73
US7232743B2Jun 19, 2007
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same
SOITEC SILICON ON INSULATOR9 citations73
US6995427B2Feb 7, 2006
Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same
SOITEC SILICON ON INSULATOR9 citations73
US6908774B2Jun 21, 2005
Method and apparatus for adjusting the thickness of a thin layer of semiconductor material
SOITEC SILICON ON INSULATOR9 citations73
US7572714B2Aug 11, 2009
Film taking-off method
SOITEC SILICON ON INSULATOR4 citations63
US7602046B2Oct 13, 2009
Recycling by mechanical means of a wafer comprising a multilayer structure after taking-off a thin layer thereof
SOITEC SILICON ON INSULATOR4 citations62
US7544976B2Jun 9, 2009
Semiconductor heterostructure
SOITEC SILICON ON INSULATOR5 citations62
US7033905B2Apr 25, 2006
Recycling of a wafer comprising a buffer layer after having separated a thin layer therefrom by mechanical means
SOITEC SILICON ON INSULATOR5 citations61
US7378729B2May 27, 2008
Recycling a wafer comprising a buffer layer, after having separated a thin layer therefrom
SOITEC SILICON ON INSULATOR0 citations51
COMMISSARIAT ENERGIE ATOMIQUE
2 patentsUS6991995B2Jan 31, 2006
Method of producing a semiconductor structure having at least one support substrate and an ultrathin layer
COMMISSARIAT ENERGIE ATOMIQUE54 citations96
US7115481B2Oct 3, 2006
Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
COMMISSARIAT ENERGIE ATOMIQUE10 citations74