Inventor

CHAN TSIU C

US61 patents

⚠️ This page may combine multiple inventors who share the name “CHAN TSIU C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAN TSIU C

SGS THOMSON MICROELECTRONICS

Method of forming raised source/drain regions in a integrated circuit

Method of forming planarized structures in an integrated circuit

Method for fabricating semiconductor devices by use of an N+ buried layer for complete isolation

Method of making a stacked capacitor DRAM cell

Method for forming a self-aligned source/drain contact for an MOS transistor

Virtual ground read only memory circuit

Electrostatic discharge protection structure

Polycrystalline silicon contact structure

ESD protection circuit

Method of making transistor devices in an SRAM cell

Method of forming a MOSFET structure with planar surface

Method of making SRAM cell and structure with polycrystalline P-channel load devices

Method of making a stacked copacitor for dram cell

Field effect device with polycrystalline silicon channel

Method of forming a landing pad structure in an integrated circuit

Method of forming a landing pad structure in an integrated circuit

Method for fabricating semiconductor circuits

Field effect device with polycrystalline silicon channel

Local interconnect structure

Method of making SRAM cell and structure with polycrystalline p-channel load devices

Pad oxide protect sealed interface isolation process

Method for fabricating semiconductor circuits

Manufacture of CMOS devices

Method of making contact alignment for nonvolatile memory devices

Method of making contact alignment for nonvolatile memory devices

Coplanar twin-well integrated circuit structure

Contact alignment for integrated circuits

Capacitor for DRAM cell

ST MICROELECTRONICS INC

Radiation hardened semiconductor memory

Silver metallization by damascene method

Radiation hardened semiconductor memory

Method of forming raised source/drain regions in an integrated circuit

Method for forming planarized multilevel metallization in an integrated circuit

Radiation hardened semiconductor memory

Method of forming a landing pad structure in an integrated circuit

Shadow memory for a SRAM and method

Shadow memory for a SRAM and method

Floating gate content addressable memory

Silver metallization by damascene method

Method of forming a contact in an integrated circuit

Method of forming a landing pad structure in an integrated circuit

Method of forming planarized multilevel metallization in an integrated circuit

MOSTEK CORP

Method of making MOSFET by multiple implantations followed by a diffusion step

Symmetrical cell layout for static RAM

One transistor-one capacitor memory cell

Method of making an extremely low current load device for integrated circuit

Extremely low current load device for integrated circuit

Method for making a semiconductor device

STMICROCELECTRONICS INC

Radiation hardened semiconductor memory

THOMSON COMPONENTS MOSTEK CORP

Method of making a trench capacitor and dram memory cell