Inventor
FEISTE KURT ALAN
US18 patents
⚠️ This page may combine multiple inventors who share the name “FEISTE KURT ALAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
17 patentsUS6021485AFeb 1, 2000
Forwarding store instruction result to load instruction with reduced stall or flushing by effective/real data address bytes matching
IBM113 citations98
US6349382B1Feb 19, 2002
System for store forwarding assigning load and store instructions to groups and reorder queues to keep track of program order
IBM56 citations96
US7350056B2Mar 25, 2008
Method and apparatus for issuing instructions from an issue queue in an information handling system
IBM32 citations92
US6658534B1Dec 2, 2003
Mechanism to reduce instruction cache miss penalties and methods therefor
IBM28 citations92
US6266767B1Jul 24, 2001
Apparatus and method for facilitating out-of-order execution of load instructions
IBM28 citations92
US6070238AMay 30, 2000
Method and apparatus for detecting overlap condition between a storage instruction and previously executed storage reference instruction
IBM25 citations92
US5963978AOct 5, 1999
High level (L2) cache and method for efficiently updating directory entries utilizing an n-position priority queue and priority indicators
IBM39 citations92
US5926830AJul 20, 1999
Data processing system and method for maintaining coherency between high and low level caches using inclusive states
IBM50 citations92
US6134646AOct 17, 2000
System and method for executing and completing store instructions
IBM42 citations90
US5860100AJan 12, 1999
Pipelined flushing of a high level cache and invalidation of lower level caches
IBM25 citations89
US5832276ANov 3, 1998
Resolving processor and system bus address collision in a high-level cache
IBM36 citations89
US5822765AOct 13, 1998
System and method for resolving contention arising from execution of cache coherency operations in a multiple cache computer system
IBM27 citations88
US7412589B2Aug 12, 2008
Method to detect a stalled instruction stream and serialize micro-operation execution
IBM13 citations84
US5974259AOct 26, 1999
Data processing system and method of operation having input/output drivers with reduced power consumption and noise levels
IBM8 citations71
US7370176B2May 6, 2008
System and method for high frequency stall design
IBM2 citations62
US7953960B2May 31, 2011
Method and apparatus for delaying a load miss flush until issuing the dependent instruction
IBM1 citations52
US6167500ADec 26, 2000
Mechanism for queuing store data and method therefor
IBM1 citations52