Inventor

KURIYAMA MASAO

JP58 patents

⚠️ This page may combine multiple inventors who share the name “KURIYAMA MASAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KURIYAMA MASAO

TOSHIBA KK

Semiconductor integrated circuit device

Nonvolatile semiconductor memory device with first and second read modes

Semiconductor device that enables simultaneous read and write/erase operation

Semiconductor device with a charge pumping circuit

Semiconductor device that enables simultaneous read and write/read operation

Nonvolatile semiconductor memory

Semiconductor memory device having redundant circuitry for replacing defective memory cell

Semiconductor memory and nonvolatile semiconductor memory having redundant circuitry for replacing defective memory cell

Semiconductor integrated circuit device

Nonvolatile semiconductor memory

Nonvolatile semiconductor memory in which the number of programming or erasing bits increases with the progress of programming or erasing

Semiconductor intergrated circuit device with a main cell array and a fuse cell array whose word lines and bit lines are extended in the same directions

Semiconductor integrated circuit device with operation/function setting information memory

Nonvolatile semiconductor memory

Non-volatile semiconductor memory device capable of pre-conditioning memory cells prior to a data erasure

Nonvolatile semiconductor memory system

Data erase mechanism for nonvolatile memory of boot block type

Non-volatile semiconductor memory device and data erasing method therefor

Semiconductor integrated circuit device having a test mode setting circuit

Nonvolatile semiconductor memory capable of simultaneously equalizing bit lines and sense lines

Semiconductor device that enables simultaneous read and write/read operation

Semiconductor device that enables simultaneous read and write/erase operation

High speed internal voltage generator with reduced current draw

Semiconductor device that enables simultaneous read and write/read operation

Semiconductor integrated circuit device with erasable and programmable fuse memory

Semiconductor device that enables simultaneous read and write/read operation

Nonvolatile semiconductor memory

Semiconductor integrated circuit device

Negative-potential detecting circuit having an enhanced sensitivity of detecting negative potentials

Non-volatile semiconductor memory device capable of pre-conditioning memory cells prior to a data erasure

Semiconductor memory device having improved cell array layout

Bias voltage generating circuit

Semiconductor memory device including programming circuitry

Nonvolatile semiconductor memory in which the number of programming or erasing bits increases with the progress of programming or erasing

Nonvolatile semiconductor memory device which stores multivalue data

Nonvolatile semiconductor memory device which stores multivalue data

Nonvolatile semiconductor memory device capable of concurrently and reliably writing/erasing and reading memory cores

SAMSUNG ELECTRONICS CO LTD

Erase discharge control method of nonvolatile semiconductor memory device

Error check and correction circuit, method, and memory device

Semiconductor memory device and memory system including the same

Semiconductor storage device and method for operating the same

Negative potential discharge circuit and method thereof

Voltage generation circuit and method thereof

YANGTZE MEMORY TECH CO LTD

Page buffer circuits of three-dimensional memory device

Digital verify failbit count (VFC) circuit

Digital Verify Failbit Count (VFC) circuit

Digital verify failbit count (VFC) circuit

Page buffer circuits in three-dimensional memory devices

US ARMY

Hard x-ray magnification apparatus and method with submicrometer spatial resolution of images in more than one dimension

SHIKIBO LTD

Process for improving cellulose fiber properties and for dyeing the same