Inventor
SHINDOU HIROYUKI
JP2 patents
Patents
2 patentsUS7504850B2Mar 17, 2009
Single-event-effect tolerant SOI-based inverter, NAND element, NOR element, semiconductor memory device and data latch circuit
JAPAN AEROSPACE EXPLORATION27 citations85
US7576583B2Aug 18, 2009
Single-event effect tolerant latch circuit and flip-flop circuit
JAPAN AEROSPACE EXPLORATION12 citations76