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Inventor
JEONG CHUL SOO
KR
2 patents
Patents
2 patents
US8698527B2
Apr 15, 2014
Circuit and method for preventing false lock and delay locked loop using the same
MOON YONG HWAN
2 citations
54
US8659329B2
Feb 25, 2014
Pre-emphasis circuit and differential current signaling system having the same
MOON YONG HWAN
1 citations
44