Inventor
PRADEEP YELEHANKA R
SG2 patents
Patents
2 patentsUS6277716B1Aug 21, 2001
Method of reduce gate oxide damage by using a multi-step etch process with a predictable premature endpoint system
CHARTERED SEMICONDUCTOR MFG26 citations84
US7060193B2Jun 13, 2006
Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits
CHARTERED SEMICONDUCTOR MFG3 citations60