Inventor

VENKATESH SHEKARIPURAM V

US6 patents

⚠️ This page may combine multiple inventors who share the name “VENKATESH SHEKARIPURAM V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SYNOPSYS INC

4 patents

US10311192B2Jun 4, 2019

System and method for power verification using efficient merging of power state tables

SYNOPSYS INC2 citations68

US12298841B1May 13, 2025

Failure prediction of field-deployed mission critical integrated circuit chips using artificial intelligence

SYNOPSYS INC1 citations52

US9405872B2Aug 2, 2016

System and method for reducing power of a circuit using critical signal analysis

SYNOPSYS INC0 citations36

US10733342B2Aug 4, 2020

System and method for hierarchical power verification

SYNOPSYS INC0 citations34

CADENCE DESIGN SYSTEMS INC

2 patents

US6442739B1Aug 27, 2002

System and method for timing abstraction of digital logic circuits

CADENCE DESIGN SYSTEMS INC42 citations90

US6877143B1Apr 5, 2005

System and method for timing abstraction of digital logic circuits

CADENCE DESIGN SYSTEMS INC6 citations71