Inventor · disambiguated record
Mitesh R. Meswani
Also filed as: MESWANI MITESH · MESWANI MITESH R · MESWANI MITESH RAMESH
18 granted patents·5 pending applications·81 citations·filing 2014–2019
91Inventor score
Top patents by PatentIndex Score
23 records- 0196US9443561B1Ring networks for intra- and inter-memory I/O including 3D-stacked memoriesADVANCED MICRO DEVICES INC·Filed 2015·Granted Sep 13, 2016·39 cites·20 claims
- 0290US10110506B2System and method for quota management in a cloud platform environmentORACLE INT CORP·Filed 2014·Granted Oct 23, 2018·16 cites·20 claims
- 0383US10365996B2Performance-aware and reliability-aware data placement for n-level heterogeneous memory systemsADVANCED MICRO DEVICES INC·Filed 2016·Granted Jul 30, 2019·4 cites·16 claims
- 0483US10282292B2Cluster-based migration in a multi-level memory hierarchyADVANCED MICRO DEVICES INC·Filed 2016·Granted May 7, 2019·5 cites·20 claims
- 0580US9727241B2Memory page access detectionADVANCED MICRO DEVICES INC·Filed 2015·Granted Aug 8, 2017·3 cites·20 claims
- 0678US10503655B2Data block sizing for channels in a multi-channel high-bandwidth memoryADVANCED MICRO DEVICES INC·Filed 2016·Granted Dec 10, 2019·3 cites·17 claims
- 0778US10089014B2Memory-sampling based migrating page cacheADVANCED MICRO DEVICES INC·Filed 2016·Granted Oct 2, 2018·5 cites·14 claims
- 0873US10235290B2Hot page selection in multi-level memory hierarchiesADVANCED MICRO DEVICES INC·Filed 2015·Granted Mar 19, 2019·2 cites·20 claims
- 0968US10713059B2Heterogeneous graphics processing unit for scheduling thread groups for execution on variable width SIMD unitsADVANCED MICRO DEVICES INC·Filed 2014·Granted Jul 14, 2020·2 cites·15 claims
- 1066US10592279B2Multi-processor apparatus and method of detection and acceleration of lagging tasksADVANCED MICRO DEVICES INC·Filed 2016·Granted Mar 17, 2020·1 cites·16 claims
- 1160US10324760B2Leases for blocks of memory in a multi-level memoryADVANCED MICRO DEVICES INC·Filed 2016·Granted Jun 18, 2019·1 cites·18 claims
- 1257US11573724B2Scoped persistence barriers for non-volatile memoriesADVANCED MICRO DEVICES INC·Filed 2019·Granted Feb 7, 2023·0 cites·20 claims
- 1354US11822926B2Device link managementNVIDIA CORP·Filed 2019·Granted Nov 21, 2023·0 cites·23 claims
- 1454US10318153B2Techniques for changing management modes of multilevel memory hierarchyADVANCED MICRO DEVICES INC·Filed 2014·Granted Jun 11, 2019·0 cites·16 claims
- 1554US10122650B2System and method for tenant management in a cloud platform environmentORACLE INT CORP·Filed 2014·Granted Nov 6, 2018·0 cites·20 claims
- 1653US9377954B2System and method for memory allocation in a multiclass memory systemADVANCED MICRO DEVICES INC·Filed 2014·Granted Jun 28, 2016·0 cites·18 claims
- 1750US10324650B2Scoped persistence barriers for non-volatile memoriesADVANCED MICRO DEVICES INC·Filed 2016·Granted Jun 18, 2019·0 cites·18 claims
- 1847US9983655B2Method and apparatus for performing inter-lane power managementADVANCED MICRO DEVICES INC·Filed 2015·Granted May 29, 2018·0 cites·12 claims
- 1942US2015206574A1Relocating infrequently-accessed dynamic random access memory (dram) data to non-volatile storageADVANCED MICRO DEVICES INC·Filed 2014·Application pending·0 cites
- 2038US2017147228A1Computation along a datapath between memory blocksADVANCED MICRO DEVICES INC·Filed 2015·Application pending·0 cites
- 2136US2016378667A1Independent between-module prefetching for processor memory modulesADVANCED MICRO DEVICES INC·Filed 2015·Application pending·0 cites
- 2236US2017083474A1Distributed memory controllerADVANCED MICRO DEVICES INC·Filed 2015·Application pending·0 cites
- 2336US2017083444A1Configuring fast memory as cache for slow memoryADVANCED MICRO DEVICES INC·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →