Inventor
HSU JEN-TAI
TW21 patents
⚠️ This page may combine multiple inventors who share the name “HSU JEN-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
WUHAN XINXIN SEMICONDUCTOR MFG
10 patentsUS10498215B1Dec 3, 2019
Voltage regulator with flexible output voltage
WUHAN XINXIN SEMICONDUCTOR MFG5 citations73
US10606299B2Mar 31, 2020
Circuit for regulating leakage current in charge pump
WUHAN XINXIN SEMICONDUCTOR MFG3 citations71
US10340793B1Jul 2, 2019
Digital control of charge pump
WUHAN XINXIN SEMICONDUCTOR MFG1 citations62
US10482968B1Nov 19, 2019
Local x-decoder and related memory system
WUHAN XINXIN SEMICONDUCTOR MFG0 citations52
US10650866B2May 12, 2020
Charge pump drive circuit
WUHAN XINXIN SEMICONDUCTOR MFG0 citations51
US10748618B2Aug 18, 2020
Local X-decoder and related memory system with a voltage clamping transistor
WUHAN XINXIN SEMICONDUCTOR MFG0 citations41
US10515705B1Dec 24, 2019
Removing pump noise in a sensing circuit
WUHAN XINXIN SEMICONDUCTOR MFG0 citations41
US10482967B1Nov 19, 2019
Layout structure of local x-decoder
WUHAN XINXIN SEMICONDUCTOR MFG0 citations41
US10770153B2Sep 8, 2020
Charge pump drive circuit with two switch signals
WUHAN XINXIN SEMICONDUCTOR MFG0 citations39
US10684316B2Jun 16, 2020
Voltage detection circuit for charge pump
WUHAN XINXIN SEMICONDUCTOR MFG0 citations36
INTEL CORP
7 patentsUS6445316B1Sep 3, 2002
Universal impedance control for wide range loaded signals
INTEL CORP81 citations97
US6380758B1Apr 30, 2002
Impedance control for wide range loaded signals using distributed methodology
INTEL CORP104 citations97
US6313661B1Nov 6, 2001
High voltage tolerant I/O buffer
INTEL CORP20 citations92
US6556022B2Apr 29, 2003
Method and apparatus for local parameter variation compensation
INTEL CORP16 citations80
US7245682B2Jul 17, 2007
Determining an optimal sampling clock
INTEL CORP8 citations73
US6507218B1Jan 14, 2003
Method and apparatus for reducing back-to-back voltage glitch on high speed data bus
INTEL CORP9 citations73
US7356796B2Apr 8, 2008
Method and apparatus to boost high-speed I/O signal performance using semi-interleaved transmitter/receiver pairs at silicon die bump and package layout interfaces
INTEL CORP0 citations44