Inventor

SARIN VISHAL

US177 patents

⚠️ This page may combine multiple inventors who share the name “SARIN VISHAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SARIN VISHAL

MICRON TECHNOLOGY INC

Non-equal threshold voltage ranges in MLC NAND

M+N bit programming and M+L bit read for M bit memory cells

Programming error correction code into a solid state memory device with varying bits per cell

Sensing of memory cells in NAND flash

Reducing effects of program disturb in a memory device

Programming a memory with varying bits per cell

Methods for pattern matching using multiple cell pairs

Refresh of non-volatile memory cells based on fatigue conditions

Memory cell threshold voltage drift estimation methods and apparatus

Reducing effects of program disturb in a memory device

Analog sensing of memory cells in a solid state memory device

Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device

Memory controller self-calibration for removing systemic influence

Memory cell shift estimation method and apparatus

Analog read and write paths in a solid state memory device

Analog sensing of memory cells with a source follower driver in a semiconductor memory device

Programming sequence in NAND memory

Non-volatile multilevel memory cells with data read of reference cells

Program window adjust for memory cell signal line delay

Coarse and fine programming in a solid state memory

Programming based on controller performance requirements

M+L bit read column architecture for M bit memory cells

Methods and apparatus for pattern matching using redundant memory elements

Programming error correction code into a solid state memory device with varying bits per cell

Memory controller self-calibration for removing systemic influence

Analog sensing of memory cells with a source follower driver in a semiconductor memory device

Reducing effects of program disturb in a memory device

Programming error correction code into a solid state memory device with varying bits per cell

Memory adapted to program a number of bits to a memory cell and read a different number of bits from the memory cell

Reducing effects of program disturb in a memory device

SILICON STORAGE TECH INC

Fast voltage regulators for charge pumps

Fast start charge pump for voltage regulators

Unified multilevel memory systems and methods

Test circuit and method for multilevel cell flash memory

Unified multilevel cell memory

SARIN VISHAL

Single check memory devices and methods

Programming methods and memories

Replacing defective memory blocks in response to external addresses

Apparatus having a string of memory cells

Systems and methods for erasing a memory

ROOHPARVAR FRANKIE F

Refresh of non-volatile memory cells based on fatigue conditions

Refresh of non-volatile memory cells based on fatigue conditions

Coarse and fine programming in a solid state memory

MOSCHIANO VIOLANTE

Threshold voltage compensation in a multilevel memory

Memory apparatus, systems, and methods

RADKE WILLIAM H

Data conditioning to improve flash memory reliability

PROGRAMMABLE MICROELECTRONICS

Sensing scheme for non-volatile memories

INTEL CORP

Match resolution circuit for an associative memory

INFORMATION STORAGE DEVICES

Method and apparatus for automatic gain control using a linear limiter circuit with voltage controlled resistors as a variable element

HOEI JUNG-SHENG

Methods of operating memories including characterizing memory cell signal lines