Inventor

YIP AARON

US112 patents

⚠️ This page may combine multiple inventors who share the name “YIP AARON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YIP AARON

MICRON TECHNOLOGY INC

Conductive structures, systems and devices including conductive structures and related methods

Memory device trims

Programming memory devices

Programming memory devices

3D memory device including shared select gate connections between memory blocks

Reducing programming disturbance in memory devices

Semiconductor devices including stair step structures, and related methods

Selective threshold voltage verification and compaction

Erase operation control sequencing apparatus, systems, and methods

Programming memory devices

Random cache read

Microelectronic devices including staircase structures, and related memory devices and electronic systems

Reducing programming disturbance in memory devices

Methods of forming conductive structures including stair step or tiered structures having conductive portions

Apparatuses and methods using dummy cells programmed to different states

Semiconductor devices including stair step structures, and related methods

Apparatuses and methods using dummy cells programmed to different states

Select gate programming in a memory device

Handling defective memory blocks of NAND memory devices

Method of comparison between cache and data register for non-volatile memory

Random cache read

Method of comparison between cache and data register for non-volatile memory

Multi-pass programming in a memory device

Method and apparatus for providing a non-volatile memory with reduced cell capacitive coupling

Programming memory devices

Selective threshold voltage verification and compaction

Memory block reallocation in a flash memory device

Handling defective memory blocks of NAND memory devices

Non-volatile programmable fuse apparatus in a memory device

Reducing programming disturbance in memory devices

3D memory device including shared select gate connections between memory blocks

Reducing programming disturbance in memory devices

Memory devices including stair step or tiered structures and related methods

Memory block select circuitry including voltage bootstrapping control

3D memory device including shared select gate connections between memory blocks

Memories having select devices between access lines and in memory cells

CYPRESS SEMICONDUCTOR CORP

Charge pump with reduced power consumption

Charge pump architecture for integrated circuit

Charge pump architecture

YIP AARON

Multi-pass programming in a memory device

Methods and devices for memory reads with precharged data lines

Dynamic wordline start voltage for nand programming

HOUZZ INC

Generating enhanced images using dimensional data

Techniques for recommending and presenting products in an augmented reality scene

User device augmented reality virtual item modeling

SARIN VISHAL

Single check memory devices and methods

YAMADA SHIGEKAZU

Select gate programming in a memory device

INTEL CORP

Three dimensional storage cell array with highly dense and scalable word line design approach

HELM MARK

Three dimensional memory control circuitry

HAN JIN-MAN

Memory block reallocation in a flash memory device