Inventor

SREERAMA CHAITANYA

US19 patents

⚠️ This page may combine multiple inventors who share the name “SREERAMA CHAITANYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SREERAMA CHAITANYA

INTEL CORP

Closed loop adaptive clock RFI mitigation

Methods and apparatus to train interdependent autonomous machines

Managing system clocks to reduce RFI

Methods and apparatus to manage operation of variable-state computing devices using artificial intelligence

Methods and apparatus to add common sense reasoning to artificial intelligence in the context of human machine interfaces

Multiple-layer, self-equalizing interconnects in package substrates

Adaptive control of clock spread to mitigate radio frequency interference

Methods, systems, articles of manufacture and apparatus to improve boundary excursion detection

Logic-based decoder for crosstalk-harnessed signaling

Adaptive control of clock spread to mitigate radio frequency interference

Mode selective balanced encoded interconnect

Crosstalk aware encoding for a data bus

Crosstalk aware decoding for a data bus

Computer-assisted or autonomous driving safety-related decision making system and apparatus

SREERAMA CHAITANYA

Radio frequency interference sensing system and method

Dynamic RFI detection

Dynamic RFI mitigation

Dynamic RFI detection using signal strength values

Dynamic RFI detection