Inventor
AZIMI SAEED
US69 patents
⚠️ This page may combine multiple inventors who share the name “AZIMI SAEED”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MARVELL INT LTD
32 patentsUS7216276B1May 8, 2007
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD72 citations98
US7073099B1Jul 4, 2006
Method and apparatus for improving memory operation and yield
MARVELL INT LTD33 citations96
US8015224B1Sep 6, 2011
Entropy source for random number generation
MARVELL INT LTD35 citations93
US7962809B1Jun 14, 2011
Method and apparatus for improving memory operation and yield
MARVELL INT LTD9 citations93
US7818636B1Oct 19, 2010
Method and apparatus for improving memory operation and yield
MARVELL INT LTD11 citations93
US7809998B1Oct 5, 2010
Method and apparatus for improving memory operation and yield
MARVELL INT LTD13 citations93
US6871251B1Mar 22, 2005
High latency interface between hardware components
MARVELL INT LTD17 citations93
US7930604B1Apr 19, 2011
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD14 citations92
US7721167B1May 18, 2010
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD12 citations92
US7590911B1Sep 15, 2009
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD14 citations92
US7562276B1Jul 14, 2009
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD17 citations92
US7496812B1Feb 24, 2009
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD18 citations92
US7496818B1Feb 24, 2009
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD19 citations92
US7444571B1Oct 28, 2008
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD16 citations92
US7405980B1Jul 29, 2008
Shared terminal memory interface
MARVELL INT LTD11 citations92
US7253652B2Aug 7, 2007
Integrated systems testing
MARVELL INT LTD12 citations92
US6859399B1Feb 22, 2005
Memory architecture and system and multiport interface protocol
MARVELL INT LTD19 citations92
US7308530B1Dec 11, 2007
Architecture for a data storage device
MARVELL INT LTD24 citations89
US9739834B1Aug 22, 2017
System and method for transferring serialized test result data from a system on a chip
MARVELL INT LTD5 citations84
US9285421B1Mar 15, 2016
Serializer/deserializer and method for transferring data between an integrated circuit and a test interface
MARVELL INT LTD6 citations84
US9037875B1May 19, 2015
Key generation techniques
MARVELL INT LTD9 citations84
US8356223B1Jan 15, 2013
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD7 citations84
US7533240B1May 12, 2009
Device with mapping between non-programmable and programmable memory
MARVELL INT LTD9 citations84
US6868470B1Mar 15, 2005
Interface protocol for a disk drive, SRAM and DRAM
MARVELL INT LTD10 citations82
US7873766B2Jan 18, 2011
Integrated systems testing
MARVELL INT LTD6 citations74
US7439729B2Oct 21, 2008
Integrated systems testing
MARVELL INT LTD8 citations74
US7389374B1Jun 17, 2008
High latency interface between hardware components
MARVELL INT LTD7 citations74
US7250784B2Jul 31, 2007
Integrated systems testing
MARVELL INT LTD7 citations74
US7250751B2Jul 31, 2007
Integrated systems testing
MARVELL INT LTD4 citations74
US7171507B2Jan 30, 2007
High latency interface between hardware components
MARVELL INT LTD9 citations74
US6721913B1Apr 13, 2004
Method and apparatus for testing an interface between separate hardware components
MARVELL INT LTD9 citations74
US8572448B1Oct 29, 2013
Apparatus and method for testing and debugging an integrated circuit
MARVELL INT LTD3 citations73
MARVELL WORLD TRADE LTD
5 patentsUS7870331B2Jan 11, 2011
Fully-buffered dual in-line memory module with fault correction
MARVELL WORLD TRADE LTD7 citations93
US7823030B2Oct 26, 2010
Fully-buffered dual in-line memory module with fault correction
MARVELL WORLD TRADE LTD12 citations93
US7814382B2Oct 12, 2010
Fully-buffered dual in-line memory module with fault correction
MARVELL WORLD TRADE LTD15 citations93
US8745450B2Jun 3, 2014
Fully-buffered dual in-line memory module with fault correction
MARVELL WORLD TRADE LTD4 citations84
US7818639B2Oct 19, 2010
Fully-buffered dual in-line memory module with fault correction
MARVELL WORLD TRADE LTD7 citations82
AZIMI SAEED
4 patentsUS9247004B2Jan 26, 2016
System and method for reliable and scalable health monitoring
AZIMI SAEED22 citations92
US8161336B1Apr 17, 2012
Apparatus and method for testing and debugging an integrated circuit
AZIMI SAEED8 citations92
US8074135B1Dec 6, 2011
Apparatus and method for testing and debugging an integrated circuit
AZIMI SAEED9 citations84
USD745685SDec 15, 2015
Vital sign sensor
AZIMI SAEED4 citations73
VITAL CONNECT INC
3 patentsUS10554756B2Feb 4, 2020
System and method for reliable and scalable health monitoring
VITAL CONNECT INC17 citations94
US9762673B2Sep 12, 2017
System and method for reliable and scalable health monitoring
VITAL CONNECT INC19 citations93
US10262506B2Apr 16, 2019
Method and system for pairing a sensor device to a user
VITAL CONNECT INC17 citations86
SUTARDJA SEHAT
2 patentsYOON TONY
1 patentPOO TZE LEI
1 patentYANG YUN
1 patentDYNOSENSE CORP
1 patentShowing the top 50 of 69 patents by PatentIndex Score.