Inventor
SINHA KAMAL
US125 patents
Patents
50 patentsUS11360767B2Jun 14, 2022
Instructions and logic to perform floating point and integer operations for machine learning
INTEL CORP39 citations98
US11169799B2Nov 9, 2021
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP36 citations98
US11080046B2Aug 3, 2021
Instructions and logic to perform floating point and integer operations for machine learning
INTEL CORP38 citations98
US10474458B2Nov 12, 2019
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP46 citations98
US10353706B2Jul 16, 2019
Instructions and logic to perform floating-point and integer operations for machine learning
INTEL CORP47 citations98
US10304154B2May 28, 2019
Coordination and increased utilization of graphics processors during inference
INTEL CORP33 citations98
US10186011B2Jan 22, 2019
Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
INTEL CORP37 citations98
US11620256B2Apr 4, 2023
Systems and methods for improving cache efficiency and utilization
INTEL CORP36 citations97
US10346944B2Jul 9, 2019
Machine learning sparse computation mechanism
INTEL CORP20 citations94
US10706498B2Jul 7, 2020
Machine learning sparse computation mechanism
INTEL CORP13 citations93
US11360808B2Jun 14, 2022
Efficient thread group scheduling
INTEL CORP8 citations86
US11210760B2Dec 28, 2021
Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
INTEL CORP9 citations86
US10983594B2Apr 20, 2021
Sensory enhanced augmented reality and virtual reality device
INTEL CORP9 citations86
US12210477B2Jan 28, 2025
Systems and methods for improving cache efficiency and utilization
INTEL CORP2 citations85
US12013808B2Jun 18, 2024
Multi-tile architecture for graphics operations
INTEL CORP3 citations85
US12182062B1Dec 31, 2024
Multi-tile memory management
INTEL CORP2 citations84
US11145105B2Oct 12, 2021
Multi-tile graphics processor rendering
INTEL CORP6 citations84
US11074072B2Jul 27, 2021
Compute optimizations for neural networks using bipolar binary weight
INTEL CORP6 citations84
US10909039B2Feb 2, 2021
Data prefetching for graphics data processing
INTEL CORP5 citations84
US10452397B2Oct 22, 2019
Efficient multi-context thread distribution
INTEL CORP7 citations84
US10444817B2Oct 15, 2019
System, apparatus and method for increasing performance in a processor during a voltage ramp
INTEL CORP8 citations84
US10423415B2Sep 24, 2019
Hierarchical general register file (GRF) for execution block
INTEL CORP9 citations84
US10417731B2Sep 17, 2019
Compute optimization mechanism for deep neural networks
INTEL CORP8 citations84
US10410098B2Sep 10, 2019
Compute optimizations for neural networks
INTEL CORP5 citations84
US10401954B2Sep 3, 2019
Sensory enhanced augmented reality and virtual reality device
INTEL CORP11 citations84
US10261903B2Apr 16, 2019
Extend GPU/CPU coherency to multi-GPU cores
INTEL CORP8 citations84
US10102149B1Oct 16, 2018
Replacement policies for a hybrid hierarchical cache
INTEL CORP11 citations83
US12198221B2Jan 14, 2025
Compute optimization mechanism for deep neural networks
INTEL CORP1 citations75
US11829525B2Nov 28, 2023
Sensory enhanced augmented reality and virtual reality device
INTEL CORP4 citations75
US11797837B2Oct 24, 2023
Dynamic distributed training of machine learning models
INTEL CORP4 citations75
US12141578B2Nov 12, 2024
Instructions and logic to perform floating point and integer operations for machine learning
INTEL CORP2 citations73
US12099461B2Sep 24, 2024
Multi-tile memory management
INTEL CORP0 citations73
US11693658B2Jul 4, 2023
Compute optimizations for neural networks using ternary weight
INTEL CORP1 citations73
US11507375B2Nov 22, 2022
Hierarchical general register file (GRF) for execution block
INTEL CORP1 citations73
US11269643B2Mar 8, 2022
Data operations and finite state machine for machine learning via bypass of computational tasks based on frequently-used data values
INTEL CORP3 citations73
US11222392B2Jan 11, 2022
Compute optimization mechanism for deep neural networks
INTEL CORP1 citations73
US11175719B2Nov 16, 2021
System, apparatus and method for increasing performance in a processor during a voltage ramp
INTEL CORP3 citations73
US11080810B2Aug 3, 2021
Dynamically reconfigurable memory subsystem for graphics processors
INTEL CORP2 citations73
US11010659B2May 18, 2021
Dynamic precision for neural network compute operations
INTEL CORP2 citations73
US10956330B2Mar 23, 2021
Extend GPU/CPU coherency to multi-GPU cores
INTEL CORP2 citations73
US10943325B2Mar 9, 2021
Machine learning sparse computation mechanism
INTEL CORP1 citations73
US10902547B2Jan 26, 2021
Compute optimization mechanism for deep neural networks
INTEL CORP2 citations73
US10891707B2Jan 12, 2021
Coordination and increased utilization of graphics processors during inference
INTEL CORP1 citations73
US10871966B2Dec 22, 2020
Intelligent thread dispatch and vectorization of atomic operations
INTEL CORP4 citations73
US10769748B2Sep 8, 2020
Programmable coarse grained and sparse matrix compute hardware with advanced scheduling
INTEL CORP3 citations73
US10591971B2Mar 17, 2020
Adaptive multi-resolution for graphics
INTEL CORP3 citations73
US10579121B2Mar 3, 2020
Processor power management
INTEL CORP2 citations73
US10521349B2Dec 31, 2019
Extend GPU/CPU coherency to multi-GPU cores
INTEL CORP2 citations73
US10403003B2Sep 3, 2019
Compression mechanism
INTEL CORP1 citations73
US10346166B2Jul 9, 2019
Intelligent thread dispatch and vectorization of atomic operations
INTEL CORP4 citations73
Showing the top 50 of 125 patents by PatentIndex Score.