P

Inventor

MEZOESI GABOR

AT12 patents

Patents

12 patents
US10923432B2Feb 16, 2021

Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark

INFINEON TECHNOLOGIES AUSTRIA AG1 citations72
US10811529B2Oct 20, 2020

Transistor device with gate resistor

INFINEON TECHNOLOGIES AUSTRIA AG5 citations72
US9711357B1Jul 18, 2017

Method of manufacturing a semiconductor device with epitaxial layers and an alignment structure

INFINEON TECHNOLOGIES AUSTRIA AG6 citations72
US11329126B2May 10, 2022

Method of manufacturing a superjunction semiconductor device

INFINEON TECHNOLOGIES AUSTRIA AG1 citations62
US10411126B2Sep 10, 2019

Semiconductor device having a first through contact structure in ohmic contact with the gate electrode

INFINEON TECHNOLOGIES AUSTRIA AG1 citations62
US10374032B2Aug 6, 2019

Field-effect semiconductor device having N and P-doped pillar regions

INFINEON TECHNOLOGIES AUSTRIA AG1 citations62
US10957788B2Mar 23, 2021

Semiconductor devices with superjunction structures

INFINEON TECHNOLOGIES AUSTRIA AG0 citations54
US10600740B2Mar 24, 2020

Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark

INFINEON TECHNOLOGIES AUSTRIA AG0 citations51
US10236258B2Mar 19, 2019

Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark

INFINEON TECHNOLOGIES AUSTRIA AG0 citations51
US11374125B2Jun 28, 2022

Vertical transistor device having a discharge region comprising at least one lower dose section and located at least partially below a gate electrode pad

INFINEON TECHNOLOGIES AUSTRIA AG0 citations50
US10658497B2May 19, 2020

Method for manufacturing semiconductor devices with superjunction structures

INFINEON TECHNOLOGIES AUSTRIA AG0 citations43
US10211300B2Feb 19, 2019

Method of forming a semiconductor device

INFINEON TECHNOLOGIES AUSTRIA AG0 citations41