P

Inventor

GOH ENG HUAT

MY72 patents
⚠️ This page may combine multiple inventors who share the name “GOH ENG HUAT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

48 patents
US9972589B1May 15, 2018

Integrated circuit package substrate with microstrip architecture and electrically grounded surface conductive layer

INTEL CORP47 citations93
US7217651B2May 15, 2007

Interconnects with interlocks

INTEL CORP6 citations74
US11538633B2Dec 27, 2022

Combination stiffener and capacitor

INTEL CORP3 citations73
US10796999B2Oct 6, 2020

Floating-bridge interconnects and methods of assembling same

INTEL CORP4 citations73
US10438882B2Oct 8, 2019

Integrated circuit package with microstrip routing and an external ground plane

INTEL CORP4 citations73
US10153253B2Dec 11, 2018

Package-bottom through-mold via interposers for land-side configured devices for system-in-package apparatus

INTEL CORP2 citations73
US9836095B1Dec 5, 2017

Microelectronic device package electromagnetic shield

INTEL CORP6 citations73
US10998262B2May 4, 2021

Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge

INTEL CORP1 citations72
US10411001B2Sep 10, 2019

Dynamic random access memory (DRAM) mounts

INTEL CORP2 citations72
US10014710B2Jul 3, 2018

Foldable fabric-based packaging solution

INTEL CORP5 citations72
US9613920B2Apr 4, 2017

Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias

INTEL CORP2 citations72
US11205613B2Dec 21, 2021

Organic mold interconnects in shielded interconnects frames for integrated-circuit packages

INTEL CORP2 citations71
US10856454B2Dec 1, 2020

Electromagnetic interference (EMI) shield for circuit card assembly (CCA)

INTEL CORP3 citations71
US10388636B2Aug 20, 2019

Integrating system in package (SIP) with input/output (IO) board for platform miniaturization

INTEL CORP3 citations71
US7173342B2Feb 6, 2007

Method and apparatus for reducing electrical interconnection fatigue

INTEL CORP8 citations71
US10772206B2Sep 8, 2020

Board to board interconnect

INTEL CORP1 citations70
US10356902B2Jul 16, 2019

Board to board interconnect

INTEL CORP3 citations70
US10317938B2Jun 11, 2019

Apparatus utilizing computer on package construction

INTEL CORP2 citations68
US11177226B2Nov 16, 2021

Flexible shield for semiconductor devices

INTEL CORP0 citations63
US7795736B2Sep 14, 2010

Interconnects with interlocks

INTEL CORP2 citations63
US12400952B2Aug 26, 2025

Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge

INTEL CORP0 citations62
US11908793B2Feb 20, 2024

Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge

INTEL CORP0 citations62
US11823994B2Nov 21, 2023

Systems and apparatuses for implementing a pad on solder mask (POSM) semiconductor substrate package

INTEL CORP0 citations62
US11699664B2Jul 11, 2023

Wrappable EMI shields

INTEL CORP0 citations62
US11664317B2May 30, 2023

Reverse-bridge multi-die interconnect for integrated-circuit packages

INTEL CORP0 citations62
US11658111B2May 23, 2023

Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge

INTEL CORP0 citations62
US11658127B2May 23, 2023

RFI free picture frame metal stiffener

INTEL CORP1 citations62
US11652057B2May 16, 2023

Disaggregated die interconnection with on-silicon cavity bridge

INTEL CORP0 citations62
US11587844B2Feb 21, 2023

Electronic device package on package (POP)

INTEL CORP0 citations62
US11552403B2Jan 10, 2023

Slot antenna on a printed circuit board (PCB)

INTEL CORP0 citations62
US11393760B2Jul 19, 2022

Floating-bridge interconnects and methods of assembling same

INTEL CORP0 citations62
US11289414B2Mar 29, 2022

Systems, methods, and apparatuses for implementing a pad on solder mask (POSM) semiconductor substrate package

INTEL CORP0 citations62
US11211714B2Dec 28, 2021

Slot antenna on a printed circuit board (PCB)

INTEL CORP0 citations62
US10923415B2Feb 16, 2021

Semiconductor package having integrated stiffener region

INTEL CORP0 citations62
US10643983B2May 5, 2020

Extended stiffener for platform miniaturization

INTEL CORP1 citations62
US10256213B2Apr 9, 2019

Reduced-height electronic memory system and method

INTEL CORP1 citations62
US12575448B2Mar 10, 2026

Integrated circuit packages with on package memory architectures

INTEL CORP0 citations61
US12349276B2Jul 1, 2025

Co-planar interconnection mechanisms for circuit boards

INTEL CORP0 citations61
US12002793B2Jun 4, 2024

Integrating system in package (SiP) with input/output (IO) board for platform miniaturization

INTEL CORP0 citations61
US11929295B2Mar 12, 2024

Multi-use package architecture

INTEL CORP0 citations61
US11699644B2Jul 11, 2023

Organic mold interconnects in shielded interconnects frames for integrated-circuit packages

INTEL CORP0 citations61
US11172581B2Nov 9, 2021

Multi-planar circuit board having reduced z-height

INTEL CORP0 citations61
US11114421B2Sep 7, 2021

Integrating system in package (SiP) with input/output (IO) board for platform miniaturization

INTEL CORP0 citations61
US12500155B2Dec 16, 2025

Electronic package with passive component between substrates

INTEL CORP0 citations60
US11304299B2Apr 12, 2022

Board to board interconnect

INTEL CORP0 citations60
US11264315B2Mar 1, 2022

Electronic package with passive component between substrates

INTEL CORP1 citations60
US12581972B2Mar 17, 2026

Electrically conductive strips on a side of a memory module

INTEL CORP0 citations58
US11264160B2Mar 1, 2022

Extended package air core inductor

INTEL CORP0 citations58

TAY CHENG SIEW

1 patent

GOH ENG HUAT

1 patent

Showing the top 50 of 72 patents by PatentIndex Score.