Inventor
TEKMEN YUSUF CAGATAY
US16 patents
⚠️ This page may combine multiple inventors who share the name “TEKMEN YUSUF CAGATAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MICROSOFT TECHNOLOGY LICENSING LLC
9 patentsUS11061677B1Jul 13, 2021
Recovering register mapping state of a flushed instruction employing a snapshot of another register mapping state and traversing reorder buffer (ROB) entries in a processor
MICROSOFT TECHNOLOGY LICENSING LLC9 citations84
US11113068B1Sep 7, 2021
Performing flush recovery using parallel walks of sliced reorder buffers (SROBs)
MICROSOFT TECHNOLOGY LICENSING LLC2 citations71
US10877768B1Dec 29, 2020
Minimizing traversal of a processor reorder buffer (ROB) for register rename map table (RMT) state recovery for interrupted instruction recovery in a processor
MICROSOFT TECHNOLOGY LICENSING LLC3 citations71
US11327763B2May 10, 2022
Opportunistic consumer instruction steering based on producer instruction value prediction in a multi-cluster processor
MICROSOFT TECHNOLOGY LICENSING LLC1 citations60
US10956162B2Mar 23, 2021
Operand-based reach explicit dataflow processors, and related methods and computer-readable media
MICROSOFT TECHNOLOGY LICENSING LLC1 citations60
US11392410B2Jul 19, 2022
Operand pool instruction reservation clustering in a scheduler circuit in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations51
US11023243B2Jun 1, 2021
Latency-based instruction reservation station clustering in a scheduler circuit in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations51
US11803389B2Oct 31, 2023
Reach matrix scheduler circuit for scheduling instructions to be executed in a processor
MICROSOFT TECHNOLOGY LICENSING LLC0 citations50
US10896041B1Jan 19, 2021
Enabling early execution of move-immediate instructions having variable immediate value sizes in processor-based devices
MICROSOFT TECHNOLOGY LICENSING LLC0 citations50
QUALCOMM INC
4 patentsUS11669333B2Jun 6, 2023
Method, apparatus, and system for reducing live readiness calculations in reservation stations
QUALCOMM INC0 citations59
US11593117B2Feb 28, 2023
Combining load or store instructions
QUALCOMM INC0 citations46
US10860328B2Dec 8, 2020
Providing late physical register allocation and early physical register release in out-of-order processor (OOP)-based devices implementing a checkpoint-based architecture
QUALCOMM INC0 citations41
US10514921B2Dec 24, 2019
Fast reuse of physical register names
QUALCOMM INC0 citations40
DOCKSER KENNETH ALAN
2 patentsUS9164772B2Oct 20, 2015
Hybrid queue for storing instructions from fetch queue directly in out-of-order queue or temporarily in in-order queue until space is available
DOCKSER KENNETH ALAN10 citations82
US9304774B2Apr 5, 2016
Processor with a coprocessor having early access to not-yet issued instructions
DOCKSER KENNETH ALAN3 citations71