Inventor

TANZAWA TORU

JP303 patents

⚠️ This page may combine multiple inventors who share the name “TANZAWA TORU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TANZAWA TORU

TOSHIBA KK

Nonvolatile semiconductor memory device

Semiconductor memory device

Nonvolatile semiconductor memory device

Nonvolatile semiconductor memory device

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory device

Non-volatile semiconductor memory device

Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state

Memory system

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory device with first and second read modes

Non-volatile semiconductor memory device

Quantum tunneling effect device and semiconductor composite substrate

Nonvolatile semiconductor memory device capable of controlling mutual timing of write voltage pulse and transfer voltage pulse

Quantum tunneling effect device and semiconductor composite substrate

Nonvolatile semiconductor memory with temperature compensation for read/verify referencing scheme

Semiconductor memory device

Boosted voltage generating circuit and semiconductor memory device having the same

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory

Non-volatile semiconductor memory

Flash memory

Boosted voltage generating circuit and semiconductor memory device having the same

Pump circuit with active-mode and stand-by mode booster circuits

Nonvolatile semiconductor memory

Data-erasable non-volatile semiconductor memory device

Semiconductor memory device

Non-volatile semiconductor memory device

Nonvolatile semiconductor memory device

Eeprom semiconductor memory device including circuit for generating a voltage higher than a power supply voltage

Direct frequency modulation apparatus which modulates frequency by applying data-dependent voltage to control terminal of voltage-controlled oscillator without mediacy of PLL, and communication system

Non-volatile semiconductor memory

MICRON TECHNOLOGY INC

Method and apparatus for generating temperature-compensated read and verify operations in flash memories

Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation

Memory having memory cell string and coupling components

Connecting memory cells to a data line sequentially while applying a program voltage to the memory cells

Apparatus and methods of operating memory with erase de-bias

Apparatuses and methods for charging a global access line prior to accessing a memory

Apparatuses and methods to control body potential in memory operations

Memory read apparatus and methods

Interconnections for 3D memory

Random telegraph signal noise reduction scheme for semiconductor memories

Method and apparatus for generating read and verify operations in non-volatile memories

TANZAWA TORU

Memory having memory cell string and coupling components

Memory read apparatus and methods

Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods

Memory array with power-efficient read architecture

Apparatuses and methods including memory array data line selection

Arrangement of pairs of NAND strings that share bitline contacts while utilizing distinct sources lines

TOKYO SHIBAURA ELECTRIC CO

Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell