Inventor

DAVIS GORDON T

US57 patents

⚠️ This page may combine multiple inventors who share the name “DAVIS GORDON T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DAVIS GORDON T

IBM

Longest prefix match lookup using hash function

Method and apparatus for substantially concurrent multiple instruction thread processing by a single pipeline processor

Specialized communications processor for layered protocols

Coherent phase shift keyed demodulator

DRAM access command queuing structure

Method and system for automatically determining data communication device type and corresponding transmission rate

Time multiplexed system for tightly coupling pipelined processors to separate shared instruction and data storage units

Real-time digital signal processing relative to multiple digital communication channels

Programmable sequential logic array mechanism

System for defining data mappings between data structures

Decision tree multi-field classification dynamic rules updating and rebuilding

Longest prefix match lookup using hash function

System for compressing a search tree structure used in rule classification

Memory system with apparatus and method to enable balanced bandwidth utilization

HDLC asynchronous to synchronous converter

System and method for communicating with digital and analog devices via a single digital interface

System and method for split phase demodulation of frequency shift keyed signals

RISC-type pipeline processor having N slower execution units operating in parallel interleaved and phase offset manner with a faster fetch unit and a faster decoder

Multi-mode TDM interface circuit

Automatic multilayer ceramic (MLC) screening machine

Structure for a memory-centric page table walker

DRAM access command queuing

Multi-field classification dynamic rule updates

Apparatus and method for using branch prediction heuristics for determination of trace formation readiness

Apparatus and method for supporting simultaneous storage of trace and standard cache lines

Active flow management with hysteresis

Differential phase modulation demodulator

Caching lookups based upon TCP traffic flow characteristics

Programmable priority branch circuit

Tap rotation n fractionally spaced equalizer to compensate for drift due to fixed sample rate

Method for managing multi-field classification rules relating to ingress

Multi-bit Patricia trees

Method and system for interpolating baud rate timing recovery for asynchronous start stop protocol

Method of inserting and deleting leaves in tree table structures

Performance of a cache by detecting cache lines that have been reused

Processor-based smart packet memory interface

Network congestion detection and automatic fallback: methods, systems and program products

Method for caching lookups based upon TCP traffic flow characteristics

Structure for scheduler pipeline design for hierarchical link sharing

Data structure supporting random delete and timer function

Method and structure for enqueuing data packets for processing

Structure for supporting simultaneous storage of trace and standard cache lines

Apparatus and method for using branch prediction heuristics for determination of trace formation readiness

Balanced bandwidth utilization

System for managing multi-field classification rules relating to ingress contexts and egress contexts

Apparatus and method for saving power in a trace cache

Method and system for converting ranges into overlapping prefixes for a longest prefix match

Method and structure for deleting leaves in tree table structures

Green sheet support fixture speed and position control system for a screening machine

BASSO CLAUDE

Deleting leaves in tree table structures