Inventor
PASHLEY RICHARD D
US18 patents
⚠️ This page may combine multiple inventors who share the name “PASHLEY RICHARD D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS5978833ANov 2, 1999
Method and apparatus for accessing and downloading information from the internet
INTEL CORP231 citations99
US4272880AJun 16, 1981
MOS/SOS Process
INTEL CORP187 citations99
US6564285B1May 13, 2003
Synchronous interface for a nonvolatile memory
INTEL CORP394 citations98
US6026465AFeb 15, 2000
Flash memory including a mode register for indicating synchronous or asynchronous mode of operation
INTEL CORP362 citations98
US5696917ADec 9, 1997
Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory
INTEL CORP204 citations98
US6385688B1May 7, 2002
Asynchronous interface for a nonvolatile memory
INTEL CORP89 citations97
US6418506B1Jul 9, 2002
Integrated circuit memory and method for transferring data using a volatile memory to buffer data for a nonvolatile memory array
INTEL CORP148 citations96
US5822256AOct 13, 1998
Method and circuitry for usage of partially functional nonvolatile memory
INTEL CORP203 citations96
US5732207AMar 24, 1998
Microprocessor having single poly-silicon EPROM memory for programmably controlling optional features
INTEL CORP54 citations93
US4052229AOct 4, 1977
Process for preparing a substrate for mos devices of different thresholds
INTEL CORP46 citations92
US4033026AJul 5, 1977
High density/high speed MOS process and device
INTEL CORP42 citations92
US4178674ADec 18, 1979
Process for forming a contact region between layers of polysilicon with an integral polysilicon resistor
INTEL CORP59 citations91
US4096584AJun 20, 1978
Low power/high speed static ram
INTEL CORP51 citations88
US4026733AMay 31, 1977
Process for defining polycrystalline silicon patterns
INTEL CORP26 citations77
US3946369AMar 23, 1976
High speed MOS RAM employing depletion loads
INTEL CORP17 citations74
US5852712ADec 22, 1998
Microprocessor having single poly-silicon EPROM memory for programmably controlling optional features
INTEL CORP9 citations70