Inventor

VOLDMAN STEVEN HOWARD

US59 patents

⚠️ This page may combine multiple inventors who share the name “VOLDMAN STEVEN HOWARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VOLDMAN STEVEN HOWARD

IBM

3-D CMOS-on-SOI ESD structure and method

Methods for fabricating multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes

Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes

Method for forming a monolithic electronic module by dicing wafer stacks

3-D CMOS-on-SOI ESD structure and method

Electrostatic discharge protection circuits for mixed voltage interface and multi-rail disconnected power grid applications

Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes

Method and structures for dual depth oxygen layers in silicon-on-insulator processes

Structure and method for improved latch-up using dual depth STI with impurity implant

Structure for improved latch-up using dual depth STI with impurity implant

Having parastic shield for electrostatic discharge protection

Thin film slider with on-board multi-layer integrated circuit

Method for forming semiconductor chip and electronic module with integrated surface interconnects/components

Electrostatic discharge protection system for MR heads

Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication

Fault free fuse network

SiGe transistor, varactor and p-i-n velocity saturated ballasting element for BiCMOS peripheral circuits and ESD networks

ESD protection for GMR sensors of magnetic heads using SiGe integrated circuit devices

Variable voltage threshold ESD protection

ESD robust silicon germanium transistor with emitter NP-block mask extrinsic base ballasting resistor with doped facet region

SOI MOSFET body contact and method of fabrication

Method and structures for dual depth oxygen layers in silicon-on-insulator processes

Capacitor and method for forming same

Data storage system with TiC MR-head magnetic shield dummy shield spark gap

TiC MR-head magnetic shield dummy shield spark gap

Method for manufacturing thin film slider with on-board multi-layer integrated circuit

Electrostatic discharge protection system for MR heads

High power device isolation and integration

Structure for SOI wafers to avoid electrostatic discharge

Method and structure for SOI wafers to avoid electrostatic discharge

Semiconductor device fabrication method and apparatus using connecting implants

Electrostatic discharge power clamp circuit

Electrostatic discharge suppression circuit employing trench capacitor

Electrostatic discharge power clamp circuit

Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips

Method and apparatus for providing ESD protection and/or noise reduction in an integrated circuit

SiGe transistor, varactor and p-i-n velocity saturated ballasting element for BiCMOS peripheral circuits and ESD networks

Multichip semiconductor structures with interchip electrostatic discharge protection, and fabrication methods therefore

Capacitor and method for forming same

Method of making TiC MR-head magnetic shield dummy shield spark gap

Semiconductor device fabrication method using connecting implants

Carbon nanotube diodes and electrostatic discharge circuits and methods

Semiconductor diode structures

Method and apparatus for providing noise suppression in an integrated circuit

(unassigned)

Multichip semiconductor structures with interchip electrostatic discharge protection, and fabrication methods therefore

GAUL STEPHEN J

Thermal matching in semiconductor devices using heat distribution structures

VOLDMAN STEVEN HOWARD

Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication

GAMBINO JEFFREY PETER

High power device isolation and integration

SILICON SPACE TECH CORPORATION

FinFET device structure and method for forming same

INTERSIL INC

Isolated epitaxial modulation device