Inventor

SCHMITT-LANDSIEDEL DORIS

DE32 patents

⚠️ This page may combine multiple inventors who share the name “SCHMITT-LANDSIEDEL DORIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SCHMITT-LANDSIEDEL DORIS

SIEMENS AG

Multi-value read-only memory cell having an improved signal-to-noise ratio

Amplifier with neuron MOS transistors

Device for the jump-like addressing of specific lines of a serially operating digital memory

Matrix memory in virtual ground architecture

Matrix memory (virtual ground)

Programmable logic array having programmable output driver drive capacity

Hierarchically constructed memory having static memory cells

Static memory cell

Static memory having pipeline registers

Steep edge time-delay relay

Devices for the self-adjusting setting of the operating point in amplifier circuits with neuron MOS transistors

Tri-state-capable driver circuit

Integrated RS flip-flop circuit

Static storage cell

Digital/analog converter using a floating gate MOS neuron transistor with capacitive coupling

Integrated polysilicon diode contact for gain memory cells

Serially accessible memory means with high error correctability

Integrated JK-flipflop circuit including hot-electron transistors

Bidirectional driver circuit for PCI bus systems

Memory cell arrangement of memory cells arranged in the form of a matrix

Pointer circuit with low surface requirement high speed and low power loss

INFINEON TECHNOLOGIES AG

Flip-flop with additional state storage in the event of turn-off

Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell

Data carrier for the contactless reception of amplitude-modulated signals

Logic activation circuit

Integrated circuit arrangement comprising a field effect transistor, especially a tunnel field effect transistor

Integrated circuit having a drive circuit

Method and apparatus for switching on a voltage supply of a semiconductor circuit and corresponding semiconductor circuit

Circuit configuration for forming a MOS capacitor with a lower voltage dependence and a lower area requirement

Circuit arrangement for activating a circuit block and method for the same

HOLZ JUERGEN

Integrated circuit arrangement comprising a field effect transistor, especially a tunnel field effect transistor

UNIV MUENCHEN TECH

Nanomagnetic logic gate and an electronic device