P

Inventor

SANKMAN ROBERT L

US133 patents
⚠️ This page may combine multiple inventors who share the name “SANKMAN ROBERT L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

42 patents
US10163798B1Dec 25, 2018

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

INTEL CORP105 citations99
US6388207B1May 14, 2002

Electronic assembly with trench structures and methods of manufacture

INTEL CORP238 citations99
US9349703B2May 24, 2016

Method for making high density substrate interconnect using inkjet printing

INTEL CORP111 citations98
US8987918B2Mar 24, 2015

Interconnect structures with polymer core

INTEL CORP54 citations98
US9741664B2Aug 22, 2017

High density substrate interconnect formed through inkjet printing

INTEL CORP32 citations94
US7456047B2Nov 25, 2008

Thermally enhanced electronic flip-chip packaging with external-connector-side die and method

INTEL CORP15 citations93
US7268425B2Sep 11, 2007

Thermally enhanced electronic flip-chip packaging with external-connector-side die and method

INTEL CORP31 citations93
US6664483B2Dec 16, 2003

Electronic package with high density interconnect and associated methods

INTEL CORP53 citations92
US6555920B2Apr 29, 2003

Vertical electronic circuit package

INTEL CORP25 citations92
US7133294B2Nov 7, 2006

Integrated circuit packages with sandwiched capacitors

INTEL CORP16 citations91
US6900991B2May 31, 2005

Electronic assembly with sandwiched capacitors and methods of manufacture

INTEL CORP20 citations91
US11164818B2Nov 2, 2021

Inorganic-based embedded-die layers for modular semiconductive devices

INTEL CORP7 citations84
US10707168B2Jul 7, 2020

Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same

INTEL CORP7 citations84
US10658279B2May 19, 2020

High density package interconnects

INTEL CORP6 citations84
US10651051B2May 12, 2020

Embedded semiconductive chips in reconstituted wafers, and systems containing same

INTEL CORP6 citations84
US9971089B2May 15, 2018

Chip-to-chip interconnect with embedded electro-optical bridge structures

INTEL CORP6 citations84
US9941054B2Apr 10, 2018

Integration of embedded thin film capacitors in package substrates

INTEL CORP9 citations84
US9847234B2Dec 19, 2017

Embedded semiconductive chips in reconstituted wafers, and systems containing same

INTEL CORP4 citations84
US9646851B2May 9, 2017

Embedded semiconductive chips in reconstituted wafers, and systems containing same

INTEL CORP4 citations84
US8969140B2Mar 3, 2015

Embedded semiconductive chips in reconstituted wafers, and systems containing same

INTEL CORP8 citations84
US7932596B2Apr 26, 2011

Thermally enhanced electronic flip-chip packaging with external-connector-side die and method

INTEL CORP8 citations84
US11430724B2Aug 30, 2022

Ultra-thin, hyper-density semiconductor packages

INTEL CORP5 citations83
US10056182B2Aug 21, 2018

Surface-mount inductor structures for forming one or more inductors with substrate traces

INTEL CORP7 citations83
US9686861B2Jun 20, 2017

Glass core substrate for integrated circuit devices and methods of making the same

INTEL CORP5 citations83
US8963135B2Feb 24, 2015

Integrated circuits and systems and methods for producing the same

INTEL CORP9 citations83
US7046528B2May 16, 2006

Load-dependent variable frequency voltage regulator

INTEL CORP13 citations83
US10700051B2Jun 30, 2020

Multi-chip packaging

INTEL CORP4 citations82
US6717277B2Apr 6, 2004

Electrical assembly with vertical multiple layer structure

INTEL CORP10 citations74
US6680218B2Jan 20, 2004

Fabrication method for vertical electronic circuit package and system

INTEL CORP10 citations74
US6563210B2May 13, 2003

Parallel plane substrate

INTEL CORP7 citations74
US11894359B2Feb 6, 2024

Distributed semiconductor die and package architecture

INTEL CORP1 citations73
US11430740B2Aug 30, 2022

Microelectronic device with embedded die substrate on interposer

INTEL CORP2 citations73
US11410919B2Aug 9, 2022

Stacked silicon die architecture with mixed flipcip and wirebond interconnect

INTEL CORP3 citations73
US11355849B2Jun 7, 2022

Antenna package using ball attach array to connect antenna and base substrates

INTEL CORP4 citations73
US11328968B2May 10, 2022

Stacked die cavity package

INTEL CORP2 citations73
US11276630B2Mar 15, 2022

Planar integrated circuit package interconnects

INTEL CORP2 citations73
US11043457B2Jun 22, 2021

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

INTEL CORP3 citations73
US10651116B2May 12, 2020

Planar integrated circuit package interconnects

INTEL CORP3 citations73
US10416378B2Sep 17, 2019

Chip-to-chip interconnect with embedded electro-optical bridge structures

INTEL CORP2 citations73
US10325860B2Jun 18, 2019

Microelectronic bond pads having integrated spring structures

INTEL CORP2 citations73
US10204851B2Feb 12, 2019

High density package interconnects

INTEL CORP1 citations73
US10163810B2Dec 25, 2018

Electromagnetic interference shielding for system-in-package technology

INTEL CORP4 citations73

SANKMAN ROBERT L

2 patents

MALATKAR PRAMOD

1 patent

MA QING

1 patent

INTEL IP CORP

1 patent

GANESAN SANKA

1 patent

ROY MIHIR K

1 patent

DATTAGURU SRIRAM

1 patent

Showing the top 50 of 133 patents by PatentIndex Score.