P

Inventor

SINGH SHANKER

US21 patents

Patents

21 patents
US5233614AAug 3, 1993

Fault mapping apparatus for memory

IBM142 citations98
US6449689B1Sep 10, 2002

System and method for efficiently storing compressed data on a hard disk drive

IBM118 citations97
US6360300B1Mar 19, 2002

System and method for storing compressed and uncompressed data on a hard disk drive

IBM95 citations97
US6101624AAug 8, 2000

Method and apparatus for detecting and correcting anomalies in field-programmable gate arrays using CRCs for anomaly detection and parity for anomaly correction

IBM71 citations95
US6785837B1Aug 31, 2004

Fault tolerant memory system utilizing memory arrays with hard error detection

IBM58 citations94
US4584681AApr 22, 1986

Memory correction scheme using spare arrays

IBM104 citations94
US6324621B2Nov 27, 2001

Data caching with a partially compressed cache

IBM72 citations93
US6728156B2Apr 27, 2004

Memory array system

IBM21 citations92
US6105155AAug 15, 2000

Method and apparatus for performing on-chip function checks and locating detected anomalies within a nested time interval using CRCs or the like

IBM42 citations92
US5832005ANov 3, 1998

Fault-tolerant method and means for managing access to an initial program load stored in read-only memory or the like

IBM29 citations92
US6799291B1Sep 28, 2004

Method and system for detecting a hard failure in a memory array

IBM36 citations90
US6732291B1May 4, 2004

High performance fault tolerant memory system utilizing greater than four-bit data word memory arrays

IBM26 citations90
US6546411B1Apr 8, 2003

High-speed radix 100 parallel adder

IBM18 citations84
US6178489B1Jan 23, 2001

Method and apparatus for managing linear address mapped storage under selective compression and regency of usage constraints

IBM18 citations84
US5873126AFeb 16, 1999

Memory array based data reorganizer

IBM19 citations84
US4485471ANov 27, 1984

Method of memory reconfiguration for fault tolerant memory

IBM26 citations81
US4584682AApr 22, 1986

Reconfigurable memory using both address permutation and spare memory elements

IBM23 citations80
US6877046B2Apr 5, 2005

Method and apparatus for memory with embedded processor

IBM11 citations74
US4534029AAug 6, 1985

Fault alignment control system and circuits

IBM9 citations72
US4118786AOct 3, 1978

Integrated binary-BCD look-ahead adder

IBM12 citations72
US5485588AJan 16, 1996

Memory array based data reorganizer

IBM2 citations63