Inventor

YOU LU

US89 patents

⚠️ This page may combine multiple inventors who share the name “YOU LU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YOU LU

ADVANCED MICRO DEVICES INC

Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning

Photoresist stripping without degrading low dielectric constant materials

L-shaped spacer incorporating or patterned using amorphous carbon or CVD organic materials

Method for forming low dielectric passivation of copper interconnects

Method of forming a metal or metal nitride interface layer between silicon nitride and copper

Use of sic for preventing copper contamination of low-k dielectric layers

Method for fabricating a semiconductor device using amorphous carbon having improved etch resistance

CVD silicon carbide layer as a BARC and hard mask for gate patterning

Dual damascene integration scheme for preventing copper contamination of dielectric layer

Silane treatment of low dielectric constant materials in semiconductor device manufacturing

Methods of manufacture of uniform spin-on films

Dummy patterning for semiconductor manufacturing processes

Low-k photoresist removal process

Hot plate cure process for BCB low k interlevel dielectric

Antireflective bi-layer hardmask including a densified amorphous carbon layer

Formation of amorphous carbon ARC stack having graded transition between amorphous carbon and ARC material

CVD organic polymer film for advanced gate patterning

Laminated conductive lines and methods of forming the same

Semiconductor devices with dual nature capping/arc layers on organic-doped silica glass inter-layer dielectrics

Cu damascene interconnections using barrier/capping layer

Use of SiO2/Sin for preventing copper contamination of low-k dielectric layers

Use of sion for preventing copper contamination of dielectric layer

Semiconductor devices with dual nature capping/ARC layers on fluorine doped silica glass inter-layer dielectrics and method of forming capping/ARC layers

Apparatus for manufacturing planar spin-on films

Semiconductor device with variable composition low-k inter-layer dielectric and method of making

Rapid acceleration methods for global planarization of spin-on films

Low energy passivation of conductive material in damascene process for semiconductors

Method for improving semiconductor dielectrics

Low dielectric constant coating of conductive material in a damascene process for semiconductors

High integrity borderless vias with HSQ gap filled patterned conductive layers

Low RC interconnection

Multi-chamber deposition of silicon oxynitride film for patterning

Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes

Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication

Use of ta/tan for preventing copper contamination of low-k dielectric layers

Method of improving adhesion of capping layers to cooper interconnects

Apparatus and methods for uniform scan dispensing of spin-on materials

Forming and filling a recess in interconnect for encapsulation to minimize electromigration

Water vapor plasma for effective low-k dielectric resist stripping

Formation of self-aligned passivation for interconnect to minimize electromigration

Method for forming integrated circuit

Sealing sidewall pores in low-k dielectrics

Single damascene integration scheme for preventing copper contamination of dielectric layer

Implanted barrier layer to improve line reliability and method of forming same

Dual damascene integration scheme for preventing copper contamination of dielectric layer

Phosphine treatment of low dielectric constant materials in semiconductor device manufacturing

Method for forming an interconnect structure using a CVD organic BARC to mitigate via poisoning

RENSSELAER POLYTECH INST

Vapor deposition of parylene-F using 1,4-bis (trifluoromethyl) benzene

SPANSION LLC

Memory device having a nanocrystal charge storage region and method

ADVANCED MICRO DEVICS INC

Low RC interconnection