Inventor

YAUNG DUN-NIAN

TW539 patents

⚠️ This page may combine multiple inventors who share the name “YAUNG DUN-NIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

YAUNG DUN-NIAN

TAIWAN SEMICONDUCTOR MFG

Method and apparatus for image sensor packaging

Hybrid bonding with air-gap structure

Hybrid bonding with uniform pattern density

Bonding structure for stacked semiconductor devices

Double spacer technology for making self-aligned contacts (SAC) on semiconductor integrated circuits

Image sensor element for backside-illuminated sensor

Image sensor device having an active layer overlying a substrate and an isolating region in the active layer

Image sensor with light guides

Asymmetrical reset transistor with double-diffused source for CMOS image sensor

SRAM layout for relaxing mechanical stress in shallow trench isolation technology and method of manufacture thereof

Using an extra boron implant to improve the NMOS reverse narrow width effect in shallow trench isolation process

Enhanced color image sensor device and method of making the same

CMOS image sensor device and method

Grid metal design for large density CMOS image sensor

Method for making spectrally efficient photodiode structures for CMOS color imagers

Photodiode with tightly-controlled junction profile for CMOS image sensor with STI process

Image sensor with complementary concave and convex lens layers and method for fabrication thereof

Vertically integrated image sensor chips and methods for forming the same

Seal ring structure with a metal pad

Backside structure for a BSI image sensor device

Light shield for CMOS imager

Alignment for backside illumination sensor

Semiconductor device having enhanced photo sensitivity and method for manufacture thereof

Technology for high performance buried contact and tungsten polycide gate integration

Stacked semiconductor structure and method

Semiconductor devices and methods of manufacture thereof

Elevated photodiode with a stacked scheme

Method of making a deep junction for electrical crosstalk reduction of an image sensor

Method of fabricating a high quantum efficiency photodiode

Image sensor with optical guard ring and fabrication method thereof

Image sensor with vertically integrated thin-film photodiode

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device structure with a conductive feature passing through a passivation layer

Hybrid bonding with air-gap structure

Hybrid bond using a copper alloy for yield improvement

Hybrid bond pad structure

Structure for standard logic performance improvement having a back-side through-substrate-via

Structure for stacked logic performance improvement

Mechanisms for forming image-sensor device with deep-trench isolation structure

Mechanisms for forming image-sensor device with deep-trench isolation structure

Pixel structure of image sensor and method of forming same

Stacked integrated circuits with redistribution lines

WANG WEN-DE

Pad design for backside illuminated image sensor

Front side implanted guard ring structure for backside illuminated image sensor

HUANG KUAN-CHIEH

Method for reducing contact resistance of CMOS image sensor

Method for reducing contact resistance of CMOS image sensor

CHEN SZU-YING

Apparatus and method for improving charge transfer in backside illuminated image sensor

Image sensor with deep trench isolation structure

LIU JEN-CHENG

Bonding process for CMOS image sensor

WAN MENG-HSUN

CMOS image sensor chips with stacked scheme and methods for forming the same

CHUANG CHUN-CHIEH

Backside structure and methods for BSI image sensors