Inventor

PHILIPP JAN BORIS

US79 patents

⚠️ This page may combine multiple inventors who share the name “PHILIPP JAN BORIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PHILIPP JAN BORIS

QIMONDA NORTH AMERICA CORP

Memory device having drift compensated read operation and associated method

Multi-level resistive memory cell using different crystallization speeds

Resistive memory including selective refresh operation

Semiconductor device including multi-bit memory cells and a temperature budget sensor

Memory cell with trigger element

Integrated circuit for programming a memory element

Circuit for programming a memory element

Mushroom phase change memory having a multilayer electrode

Resistive memory including refresh operation

Memory cell programmed using a temperature controlled set pulse

Phase change memory cell including nanocomposite insulator

Integrated circuit to identify read disturb condition in memory cell

Thermal isolation of phase change memory cells

Integrated circuit having contact including material between sidewalls

Integrated circuit having a precharging circuit

System that prevents reduction in data retention

Circuit for programming a memory element

Integrated circuit including logic portion and memory portion

QIMONDA AG

Integrated circuit including diode memory cells

Integrated circuit including vertical diode

Integrated circuit including a memory element programmed using a seed pulse

Integrated circuit for setting a memory cell based on a reset current distribution

Pillar phase change memory cell

Integrated circuit including memory element doped with dielectric material

Phase change memory cell including multiple phase change material portions

Program method with locally optimized write parameters

Method to prevent overreset

Integrated circuit including memory cell having cup-shaped electrode interface

Integrated circuit including force-filled resistivity changing material

Multiple write configurations for a memory cell

Memory with dynamic redundancy configuration

Integrated circuit including memory element with high speed low current phase change material

Integrated circuit including spacer defined electrode

Conditioning operations for memory cells

INFINEON TECHNOLOGIES AG

Phase change memory having temperature budget sensor

Phase change memory having multilayer thermal insulation

Integrated circuit having resistive memory

Integrated circuit having resistive memory cells

Integrated circuit having an insulated memory

Integrated circuit having a switch

Memory having storage locations within a common volume of phase change material

IBM

Phase change memory cell with limited switchable volume

Current constricting phase change memory element structure

Current constricting phase change memory element structure

Phase change memory with tapered heater

HAPP THOMAS

Resistive memory cell accessed using two bit lines

Stacked SONOS memory

Integrated circuit with memory having a step-like programming characteristic

LUNG HSIANG LAN

Method for manufacturing a phase change memory device with pillar bottom electrode

MAJEWSKI PETRA

Integrated circuit with an array of resistance changing memory cells