Inventor
KAO JERRY C
US7 patents
Patents
7 patentsUS7349271B2Mar 25, 2008
Cascaded test circuit with inter-bitline drive devices for evaluating memory cell performance
IBM21 citations92
US7668037B2Feb 23, 2010
Storage array including a local clock buffer with programmable timing
IBM18 citations84
US7545690B2Jun 9, 2009
Method for evaluating memory cell performance
IBM9 citations83
US7760565B2Jul 20, 2010
Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance
IBM7 citations73
US7268590B2Sep 11, 2007
Method and apparatus for implementing subthreshold leakage reduction in LSDL
IBM7 citations70
US7759980B2Jul 20, 2010
Circular edge detector for measuring timing of data signals
IBM3 citations62
US7880507B2Feb 1, 2011
Circular edge detector
IBM0 citations52