Inventor
PANG LIANG-TECK
US21 patents
⚠️ This page may combine multiple inventors who share the name “PANG LIANG-TECK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
13 patentsUS8704576B1Apr 22, 2014
Variable resistance switch for wide bandwidth resonant global clock distribution
IBM20 citations92
US8736342B1May 27, 2014
Changing resonant clock modes
IBM21 citations91
US7864625B2Jan 4, 2011
Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator
IBM11 citations84
US7668037B2Feb 23, 2010
Storage array including a local clock buffer with programmable timing
IBM18 citations84
US7620510B2Nov 17, 2009
Pulsed ring oscillator circuit for storage cell read timing evaluation
IBM10 citations84
US7409305B1Aug 5, 2008
Pulsed ring oscillator circuit for storage cell read timing evaluation
IBM11 citations84
US9058130B2Jun 16, 2015
Tunable sector buffer for wide bandwidth resonant global clock distribution
IBM7 citations83
US9054682B2Jun 9, 2015
Wide bandwidth resonant global clock distribution
IBM7 citations83
US9231603B2Jan 5, 2016
Distributed phase detection for clock synchronization in multi-layer 3D stacks
IBM3 citations73
US7760565B2Jul 20, 2010
Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance
IBM7 citations73
US9800232B2Oct 24, 2017
Stitchable global clock for 3D chips
IBM0 citations52
US9348357B2May 24, 2016
Stitchable global clock for 3D chips
IBM0 citations52
US9612612B2Apr 4, 2017
Tunable sector buffer for wide bandwidth resonant global clock distribution
IBM0 citations51
KIM JAE-JOON
3 patentsUS8576000B2Nov 5, 2013
3D chip stack skew reduction with resonant clock and inductive coupling
KIM JAE-JOON24 citations91
US8587357B2Nov 19, 2013
AC supply noise reduction in a 3D stack with voltage sensing and clock shifting
KIM JAE-JOON13 citations82
US8466739B2Jun 18, 2013
3D chip stack skew reduction with resonant clock and inductive coupling
KIM JAE-JOON11 citations82
PANG LIANG-TECK
3 patentsUS8928350B2Jan 6, 2015
Programming the behavior of individual chips or strata in a 3D stack of integrated circuits
PANG LIANG-TECK2 citations60
US8519735B2Aug 27, 2013
Programming the behavior of individual chips or strata in a 3D stack of integrated circuits
PANG LIANG-TECK2 citations60
US8860425B2Oct 14, 2014
Defect detection on characteristically capacitive circuit nodes
PANG LIANG-TECK0 citations39