Inventor
SHIH NENG-TAI
TW31 patents
⚠️ This page may combine multiple inventors who share the name “SHIH NENG-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MICRON TECHNOLOGY INC
10 patentsUS10937749B2Mar 2, 2021
Methods of forming microelectronic devices including dummy dice
MICRON TECHNOLOGY INC12 citations94
US10043769B2Aug 7, 2018
Semiconductor devices including dummy chips
MICRON TECHNOLOGY INC17 citations94
US10566229B2Feb 18, 2020
Microelectronic package structures including redistribution layers
MICRON TECHNOLOGY INC6 citations84
US10446509B2Oct 15, 2019
Methods of forming and operating microelectronic devices including dummy chips
MICRON TECHNOLOGY INC1 citations73
US9748106B2Aug 29, 2017
Method for fabricating semiconductor package
MICRON TECHNOLOGY INC2 citations72
US11735540B2Aug 22, 2023
Apparatuses including dummy dice
MICRON TECHNOLOGY INC0 citations62
US11062984B2Jul 13, 2021
Methods for forming semiconductor devices
MICRON TECHNOLOGY INC0 citations61
US10818536B2Oct 27, 2020
Microelectronic devices including redistribution layers
MICRON TECHNOLOGY INC0 citations52
US9916999B2Mar 13, 2018
Methods of fabricating a semiconductor package structure including at least one redistribution layer
MICRON TECHNOLOGY INC0 citations52
US10121734B2Nov 6, 2018
Semiconductor device
MICRON TECHNOLOGY INC0 citations51
NANYA TECHNOLOGY CORP
10 patentsUS6946359B2Sep 20, 2005
Method for fabricating trench isolations with high aspect ratio
NANYA TECHNOLOGY CORP31 citations89
US7449382B2Nov 11, 2008
Memory device and fabrication method thereof
NANYA TECHNOLOGY CORP9 citations83
US7993985B2Aug 9, 2011
Method for forming a semiconductor device with a single-sided buried strap
NANYA TECHNOLOGY CORP3 citations63
US7759190B2Jul 20, 2010
Memory device and fabrication method thereof
NANYA TECHNOLOGY CORP4 citations63
US7985998B2Jul 26, 2011
Trench-type semiconductor device structure
NANYA TECHNOLOGY CORP2 citations62
US7160804B2Jan 9, 2007
Method of fabricating MOS transistor by millisecond anneal
NANYA TECHNOLOGY CORP2 citations61
US7408215B2Aug 5, 2008
Dynamic random access memory
NANYA TECHNOLOGY CORP0 citations52
US8999733B2Apr 7, 2015
Method of forming RRAM structure
NANYA TECHNOLOGY CORP1 citations51
US6927123B2Aug 9, 2005
Method for forming a self-aligned buried strap in a vertical memory cell
NANYA TECHNOLOGY CORP1 citations51
US6962847B2Nov 8, 2005
Method for forming a self-aligned buried strap in a vertical memory cell
NANYA TECHNOLOGY CORP0 citations40
INOTERA MEMORIES INC
6 patentsUS9520333B1Dec 13, 2016
Wafer level package and fabrication method thereof
INOTERA MEMORIES INC28 citations94
US9449953B1Sep 20, 2016
Package-on-package assembly and method for manufacturing the same
INOTERA MEMORIES INC46 citations94
US9437583B1Sep 6, 2016
Package-on-package assembly and method for manufacturing the same
INOTERA MEMORIES INC18 citations84
US9171847B1Oct 27, 2015
Semiconductor structure
INOTERA MEMORIES INC11 citations84
US9455243B1Sep 27, 2016
Silicon interposer and fabrication method thereof
INOTERA MEMORIES INC1 citations51
US9496358B2Nov 15, 2016
Semiconductor device and fabrication method therefor
INOTERA MEMORIES INC0 citations34