Inventor

PEDERSEN BRUCE

US70 patents

⚠️ This page may combine multiple inventors who share the name “PEDERSEN BRUCE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PEDERSEN BRUCE

ALTERA CORP

Fracturable lookup table and logic element

Logic circuitry with shared lookup table

Apparatus and methods for adjusting performance of integrated circuits

Interconnection and input/output resources for programmable logic integrated circuit devices

Apparatus and methods for adjusting performance of programmable logic devices

Generation of sub-netlists for use in incremental compilation

Generation of sub-netlists for use in incremental compilation

Omnibus logic element including look up table based logic elements

Method and apparatus for assigning and analyzing timing specifications in a computer aided engineering program

Semiconductor package with universal substrate for electrically interfacing with different sized chips that have different logic functions

Systems and methods for performing reverse order cryptographic operations on data streams

Arithmetic structures for programmable logic devices

Fracturable incomplete look up table area efficient logic elements

Reduced power consumption clock network

Fracturable incomplete look up table for area efficient logic elements

Automated implementation of non-arithmetic operators in an arithmetic logic cell

Omnibus logic element for packing or fracturing

Omnibus logic element

Apparatus and methods for adjusting performance of integrated circuits

Omnibus logic element

Interconnection and input/output resources for programmable logic integrated circuit devices

Interconnection and input/output resources for programmable logic integrated circuit devices

Multiplexing device including a hardwired multiplexer in a programmable logic device

Versatile logic element and logic array block

Initializing a carry chain in a programmable logic device

Interconnection and input/output resources for programmable logic integrated circuit devices

Versatile logic element and logic array block

Interconnection resources for programmable logic integrated circuit devices

Interconnection and input/output resources for programable logic integrated circuit devices

Technology mapping technique for fracturable logic elements

Flexible macrocell interconnect

Secure physically unclonable function (PUF) error correction

Omnibus logic element

Fracturable lookup table and logic element

Methods for producing mappings of logic suitable for FPGA and structured ASIC implementations

Logic circuitry with shared lookup table

Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency

Apparatus and method for centralized generation of an enabled clock signal for a logic array block of a programmable logic device

Flexible macrocell interconnect

Interconnection resources for programmable logic integrated circuit devices

Interconnection resources for programmable logic integrated circuit devices

Logic module circuitry for programmable logic devices

Techniques for protecting security features of integrated circuits

Omnibus logic element

Fracturable lookup table and logic element

Interconnection resources for programmable logic integrated circuit devices

Organizations of logic modules in programmable logic devices

LEWIS DAVID

Apparatus and methods for adjusting performance of integrated circuits

Fracturable lookup table and logic element

SCHLEICHER JAMES

Omnibus logic element for packing or fracturing