Inventor
SCHLEICHER JAMES
US40 patents
⚠️ This page may combine multiple inventors who share the name “SCHLEICHER JAMES”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ALTERA CORP
36 patentsUS6215326B1Apr 10, 2001
Programmable logic device architecture with super-regions having logic regions and a memory region
ALTERA CORP331 citations99
US7030652B1Apr 18, 2006
LUT-based logic element with support for Shannon decomposition and associated method
ALTERA CORP71 citations98
US6407576B1Jun 18, 2002
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP183 citations98
US7167022B1Jan 23, 2007
Omnibus logic element including look up table based logic elements
ALTERA CORP47 citations96
US6747480B1Jun 8, 2004
Programmable logic devices with bidirect ional cascades
ALTERA CORP46 citations93
US7911230B1Mar 22, 2011
Omnibus logic element for packing or fracturing
ALTERA CORP8 citations92
US7671625B1Mar 2, 2010
Omnibus logic element
ALTERA CORP10 citations92
US7565388B1Jul 21, 2009
Logic cell supporting addition of three binary words
ALTERA CORP36 citations92
US7538579B1May 26, 2009
Omnibus logic element
ALTERA CORP22 citations92
US7492188B2Feb 17, 2009
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP9 citations92
US7317332B2Jan 8, 2008
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP12 citations92
US7205791B1Apr 17, 2007
Bypass-able carry chain in a programmable logic device
ALTERA CORP24 citations92
US7061268B1Jun 13, 2006
Initializing a carry chain in a programmable logic device
ALTERA CORP40 citations92
US6989689B2Jan 24, 2006
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP13 citations92
US6727727B2Apr 27, 2004
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP13 citations92
US6614261B2Sep 2, 2003
Interconnection and input/output resources for programable logic integrated circuit devices
ALTERA CORP15 citations92
US7594208B1Sep 22, 2009
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage
ALTERA CORP18 citations91
US7181703B1Feb 20, 2007
Techniques for automated sweeping of parameters in computer-aided design to achieve optimum performance and resource usage
ALTERA CORP22 citations91
US6057707AMay 2, 2000
Programmable logic device incorporating a memory efficient interconnection device
ALTERA CORP49 citations89
US9496875B1Nov 15, 2016
Omnibus logic element
ALTERA CORP4 citations84
US7119575B1Oct 10, 2006
Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency
ALTERA CORP16 citations84
US6897680B2May 24, 2005
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP10 citations82
US6366120B1Apr 2, 2002
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP12 citations82
US6173245B1Jan 9, 2001
Programmable logic array device design using parameterized logic modules
ALTERA CORP17 citations82
US8878567B1Nov 4, 2014
Omnibus logic element
ALTERA CORP3 citations74
US7262635B2Aug 28, 2007
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP6 citations74
US6028809AFeb 22, 2000
Programmable logic device incorporating a tristateable logic array block
ALTERA CORP12 citations74
US10177766B1Jan 8, 2019
Omnibus logic element
ALTERA CORP2 citations73
US7839167B2Nov 23, 2010
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP4 citations73
US7123052B2Oct 17, 2006
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP5 citations73
US6894533B2May 17, 2005
Interconnection and input/output resources for programmable logic integrated circuit devices
ALTERA CORP6 citations73
US6480028B2Nov 12, 2002
Programmable logic device architectures with super-regions having logic regions and memory region
ALTERA CORP5 citations73
US6265895B1Jul 24, 2001
Programmable logic device incorporating a memory efficient interconnection device
ALTERA CORP13 citations70
US6879183B2Apr 12, 2005
Programmable logic device architectures with super-regions having logic regions and a memory region
ALTERA CORP2 citations63
US6525564B2Feb 25, 2003
Interconnection resources for programmable logic integrated circuit devices
ALTERA CORP2 citations63
US6362646B1Mar 26, 2002
Method and apparatus for reducing memory resources in a programmable logic device
ALTERA CORP4 citations63