Inventor

BLAAUW DAVID THEODORE

US57 patents

⚠️ This page may combine multiple inventors who share the name “BLAAUW DAVID THEODORE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BLAAUW DAVID THEODORE

UNIV MICHIGAN

Error detection and recovery within processing stages of an integrated circuit

Systematic and random error detection and recovery within processing stages of an integrated circuit

Storage device supporting logical operations, methods and storage medium

On-chip power supply voltage regulation

Isolation circuitry and method for hiding a power consumption characteristic of an associated processing circuit

Random number generator

Address decoding

Static signal value storage circuitry using a single clock signal

Memory system having fast and slow data reading mechanisms

Memory circuitry including read voltage boost

Integrated circuit memory access mechanisms

Multi-dimensional array of impedance elements

ADVANCED RISC MACH LTD

Error detection and recovery within processing stages of an integrated circuit

Systematic and random error detection and recovery within processing stages of an integrated circuit

Data retention latch provision within integrated circuits

Memory system having fast and slow data reading mechanisms

Error recovery within integrated circuit

Error recovery within integrated circuit

Error detection in precharged logic

Integrated circuit with error correction mechanisms to offset narrow tolerancing

Devices and methods to control clamping devices

Error recovery within integrated circuit

Error recovery within integrated circuit

UNIV MICHIGAN REGENTS

Physically unclonable function design

Single cycle arbitration within an interconnect

Moving-sum charge pump

Rational conversion ratio converter

Protocol for an electronic device to receive a data packet from an external device

Configurable arithmetic unit

Energy harvester

Electronic device with supervisor circuit for detecting resistance parameter of an energy storage device

Oscillator regulation circuitry and method

Apparatus and methods for generating a selection signal to perform an arbitration in a single cycle between multiple signal inputs having respective data to send

SATPATHY SUDHIR KUMAR

Crossbar circuitry for applying a pre-selection prior to arbitration between transmission requests and method of operation of such crossbar circuitry

Crossbar circuitry and method of operation of such crossbar circuitry

Crossbar circuitry for applying an adaptive priority scheme and method of operation of such crossbar circuitry

Crossbar circuitry and method of operation of such crossbar circuitry

Crossbar circuitry for applying an adaptive priority scheme and method of operation of such crossbar circuitry

FLAUTNER KRISZTIAN

Error recover within processing stages of an integrated circuit

Error recovery within processing stages of an integrated circuit

Error recovery within integrated circuit

BLAAUW DAVID THEODORE

Error recovery within processing stages of an integrated circuit

Operating parameter control of an apparatus for processing data

YANG KAIYUAN

True random number generator

DAS SHIDHARTHA

Single event upset error detection within an integrated circuit

MOTOROLA INC

Updating hierarchical DAG representations through a bottom up method

DRESLINSKI JR RONALD GEORGE

Cache memory system for a data processing apparatus

GIRIDHAR BHARAN

Memory sense amplifier with multiple modes of operation

LEE YOONMYUNG

Memory cell structure, a memory device employing such a memory cell structure, and an integrated circuit having such a memory device

BULL DAVID MICHAEL

Error detection in precharged logic