Inventor
LEE YI-CHANG
TW17 patents
⚠️ This page may combine multiple inventors who share the name “LEE YI-CHANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CHIPMOS TECHNOLOGIES BERMUDA
5 patentsUS7554197B2Jun 30, 2009
High frequency IC package and method for fabricating the same
CHIPMOS TECHNOLOGIES BERMUDA14 citations83
US7372286B2May 13, 2008
Modular probe card
CHIPMOS TECHNOLOGIES BERMUDA17 citations83
US7316065B2Jan 8, 2008
Method for fabricating a plurality of elastic probes in a row
CHIPMOS TECHNOLOGIES BERMUDA4 citations62
US7368809B2May 6, 2008
Pillar grid array package
CHIPMOS TECHNOLOGIES BERMUDA4 citations61
US7696443B2Apr 13, 2010
Electronic device with a warped spring connector
CHIPMOS TECHNOLOGIES BERMUDA0 citations51
TAIWAN SEMICONDUCTOR MFG CO LTD
4 patentsUS10515803B1Dec 24, 2019
Multiple layer scheme patterning process
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations69
US11626292B2Apr 11, 2023
Pattern formation method and method for manufacturing a semiconductor device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations61
US10943791B2Mar 9, 2021
Pattern formation method and method for manufacturing a semiconductor device
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations61
US10879070B2Dec 29, 2020
Multiple layer scheme patterning process
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations48
CHIPMOS TECHNOLOGIES INC
3 patentsUS7973310B2Jul 5, 2011
Semiconductor package structure and method for manufacturing the same
CHIPMOS TECHNOLOGIES INC37 citations89
US7642639B2Jan 5, 2010
COB type IC package to enhanced bondibility of bumps embedded in substrate and method for fabricating the same
CHIPMOS TECHNOLOGIES INC3 citations62
US7477065B2Jan 13, 2009
Method for fabricating a plurality of elastic probes in a row
CHIPMOS TECHNOLOGIES INC1 citations51