Inventor
STEPHENS JASON EUGENE
US19 patents
⚠️ This page may combine multiple inventors who share the name “STEPHENS JASON EUGENE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALFOUNDRIES INC
18 patentsUS9818641B1Nov 14, 2017
Apparatus and method of forming self-aligned cuts in mandrel and a non-mandrel lines of an array of metal lines
GLOBALFOUNDRIES INC32 citations94
US9818640B1Nov 14, 2017
Apparatus and method of forming self-aligned cuts in a non-mandrel line of an array of metal lines
GLOBALFOUNDRIES INC19 citations92
US8969199B1Mar 3, 2015
Methods of forming a circuit that includes a cross-coupling gate contact structure wherein the circuit is to be manufactured using a triple patterning process
GLOBALFOUNDRIES INC25 citations92
US9818651B2Nov 14, 2017
Methods, apparatus and system for a passthrough-based architecture
GLOBALFOUNDRIES INC15 citations91
US9852986B1Dec 26, 2017
Method of patterning pillars to form variable continuity cuts in interconnection lines of an integrated circuit
GLOBALFOUNDRIES INC19 citations84
US9691626B1Jun 27, 2017
Method of forming a pattern for interconnection lines in an integrated circuit wherein the pattern includes gamma and beta block mask portions
GLOBALFOUNDRIES INC7 citations84
US9786545B1Oct 10, 2017
Method of forming ANA regions in an integrated circuit
GLOBALFOUNDRIES INC11 citations82
US9779943B2Oct 3, 2017
Compensating for lithographic limitations in fabricating semiconductor interconnect structures
GLOBALFOUNDRIES INC5 citations73
US9818623B2Nov 14, 2017
Method of forming a pattern for interconnection lines and associated continuity blocks in an integrated circuit
GLOBALFOUNDRIES INC6 citations71
US9465907B2Oct 11, 2016
Multi-polygon constraint decomposition techniques for use in double patterning applications
GLOBALFOUNDRIES INC3 citations70
US10262941B2Apr 16, 2019
Devices and methods for forming cross coupled contacts
GLOBALFOUNDRIES INC2 citations68
US10236350B2Mar 19, 2019
Method, apparatus and system for a high density middle of line flow
GLOBALFOUNDRIES INC3 citations68
US10181420B2Jan 15, 2019
Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias
GLOBALFOUNDRIES INC2 citations68
US9812396B1Nov 7, 2017
Interconnect structure for semiconductor devices with multiple power rails and redundancy
GLOBALFOUNDRIES INC2 citations68
US10559503B2Feb 11, 2020
Methods, apparatus and system for a passthrough-based architecture
GLOBALFOUNDRIES INC1 citations61
US9530689B2Dec 27, 2016
Methods for fabricating integrated circuits using multi-patterning processes
GLOBALFOUNDRIES INC2 citations61
US9436081B2Sep 6, 2016
Methods of modifying masking reticles to remove forbidden pitch regions thereof
GLOBALFOUNDRIES INC0 citations52
US9576735B2Feb 21, 2017
Vertical capacitors with spaced conductive lines
GLOBALFOUNDRIES INC1 citations50