Inventor

SUL CHINSONG

US18 patents

⚠️ This page may combine multiple inventors who share the name “SUL CHINSONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUL CHINSONG

SILICON IMAGE INC

Interface test circuitry and methods

Scan-based testing of devices implementing a test clock control structure (“TCCS”)

Test clock control structures to generate configurable test clocks for scan-based testing of electronic circuits using programmable test clock controllers

Concurrent code checker and hardware efficient high-speed I/O having built-in self-test and debug features

Circuitry to prevent peak power problems during scan shift

Computer memory test structure

Fault testing for interconnections

Computer memory test structure

Multi-site testing of computer memory devices and serial IO ports

Computer memory test structure

Test solution for a random number generator

SUL CHINSONG

Low cost design for test architecture

Testing of high-speed input-output devices

Multi-site testing of computer memory devices and serial IO ports

Low cost design for test architecture

Test solution for ring oscillators

Low cost design for test architecture

AGILENT TECHNOLOGIES INC

Hierarchical creation of vectors for quiescent current (IDDQ) tests for system-on-chip circuits