P

Inventor

KIM HOON

US402 patents
⚠️ This page may combine multiple inventors who share the name “KIM HOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GLOBALFOUNDRIES INC

23 patents
US9847390B1Dec 19, 2017

Self-aligned wrap-around contacts for nanosheet devices

GLOBALFOUNDRIES INC74 citations98
US9780208B1Oct 3, 2017

Method and structure of forming self-aligned RMG gate for VFET

GLOBALFOUNDRIES INC60 citations98
US9012319B1Apr 21, 2015

Methods of forming gate structures with multiple work functions and the resulting products

GLOBALFOUNDRIES INC105 citations98
US9911619B1Mar 6, 2018

Fin cut with alternating two color fin hardmask

GLOBALFOUNDRIES INC24 citations94
US9899321B1Feb 20, 2018

Methods of forming a gate contact for a semiconductor device above the active region

GLOBALFOUNDRIES INC26 citations94
US9799748B1Oct 24, 2017

Method of forming inner spacers on a nano-sheet/wire device

GLOBALFOUNDRIES INC33 citations94
US9780197B1Oct 3, 2017

Method of controlling VFET channel length

GLOBALFOUNDRIES INC30 citations94
US9761495B1Sep 12, 2017

Methods of performing concurrent fin and gate cut etch processes for FinFET semiconductor devices and the resulting devices

GLOBALFOUNDRIES INC24 citations94
US9691664B1Jun 27, 2017

Dual thick EG oxide integration under aggressive SG fin pitch

GLOBALFOUNDRIES INC22 citations94
US9508604B1Nov 29, 2016

Methods of forming punch through stop regions on FinFET devices on CMOS-based IC products using doped spacers

GLOBALFOUNDRIES INC51 citations94
US9379017B1Jun 28, 2016

Method of forming a semiconductor structure including a plurality of fins and an alignment/overlay mark

GLOBALFOUNDRIES INC32 citations94
US9337101B1May 10, 2016

Methods for selectively removing a fin when forming FinFET devices

GLOBALFOUNDRIES INC25 citations94
US9178036B1Nov 3, 2015

Methods of forming transistor devices with different threshold voltages and the resulting products

GLOBALFOUNDRIES INC45 citations94
US9735242B2Aug 15, 2017

Semiconductor device with a gate contact positioned above the active region

GLOBALFOUNDRIES INC17 citations93
US9312183B1Apr 12, 2016

Methods for forming FinFETS having a capping layer for reducing punch through leakage

GLOBALFOUNDRIES INC19 citations93
US9190488B1Nov 17, 2015

Methods of forming gate structure of semiconductor devices and the resulting devices

GLOBALFOUNDRIES INC21 citations93
US9105497B2Aug 11, 2015

Methods of forming gate structures for transistor devices for CMOS applications

GLOBALFOUNDRIES INC19 citations91
US10410933B2Sep 10, 2019

Replacement metal gate patterning for nanosheet devices

GLOBALFOUNDRIES INC17 citations86
US10319627B2Jun 11, 2019

Air-gap spacers for field-effect transistors

GLOBALFOUNDRIES INC7 citations84
US10199264B2Feb 5, 2019

Self aligned interconnect structures

GLOBALFOUNDRIES INC7 citations84
US10177241B2Jan 8, 2019

Methods of forming a gate contact for a transistor above the active region and an air gap adjacent the gate of the transistor

GLOBALFOUNDRIES INC7 citations84
US10038065B2Jul 31, 2018

Method of forming a semiconductor device with a gate contact positioned above the active region

GLOBALFOUNDRIES INC10 citations84
US10014389B2Jul 3, 2018

Methods of forming IC products comprising a nano-sheet device and a transistor device having first and second replacement gate structures

GLOBALFOUNDRIES INC10 citations84

SAMSUNG DISPLAY CO LTD

10 patents

SAMSUNG ELECTRONICS CO LTD

7 patents

KIM HOON

4 patents

KOREA ADVANCED INST SCI & TECH

1 patent

JOHNSON CONTROLS TECH CO

1 patent

LUCENT TECHNOLOGIES INC

1 patent

GORDON ROY GERALD

1 patent

HARVARD COLLEGE

1 patent

LG ELECTRONICS INC

1 patent

Showing the top 50 of 402 patents by PatentIndex Score.