Inventor

GUNNA RAMESH B

US21 patents

⚠️ This page may combine multiple inventors who share the name “GUNNA RAMESH B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUNNA RAMESH B

APPLE INC

Scalable cache coherency protocol

Managing power state in one power domain based on power states in another power domain

Single power plane dynamic voltage margin recovery for multiple clock domains

IT instruction pre-decode

Next fetch predictor return address stack

Power sense correction for power budget estimator

Fetch predition circuit for reducing power consumption in a processor

Reducing power consumption in a processor

Scalable cache coherency protocol

Scalable cache coherency protocol

Scalable system on a chip

Scalable cache coherency protocol

Method and apparatus for reducing capacitor-induced noise

Power sense correction for power budget estimator

Adaptive thermal control system

Managing power state in one power domain based on power states in another power domain

Combining write buffer with dynamically adjustable flush metrics

GUNNA RAMESH B

Maintaining the integrity of an execution return address stack

Lookahead scanning and cracking of microcode instructions in a dispatch queue

BLASCO-ALLUE CONRADO

Fetch width predictor

BEAUMONT-SMITH ANDREW J

Preventing update training of first predictor with mismatching second predictor for branch instructions with alternating pattern hysteresis