Inventor

HSIAO CHING-WEN

TW138 patents

⚠️ This page may combine multiple inventors who share the name “HSIAO CHING-WEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSIAO CHING-WEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Alignment mark design for packages

Warpage control of semiconductor die package

Packaging mechanisms for dies with different sizes of connectors

Package structures and methods for forming the same

Packaging mechanisms for dies with different sizes of connectors

Warpage control of semiconductor die package

Semiconductor device with discrete blocks

Warpage reduction and adhesion improvement of semiconductor die package

Warpage control of semiconductor die package

Wafer level embedded heat spreader

Packaging mechanisms for dies with different sizes of connectors

Semiconductor device with discrete blocks

Package structures including a capacitor and methods of forming the same

Chip structure with conductive via structure and method for forming the same

Packaging mechanisms for dies with different sizes of connectors

TAIWAN SEMICONDUCTOR MFG

Fan-out interconnect structure and method for forming same

Warpage reduction and adhesion improvement of semiconductor die package

Apparatus and method for a component package

Packaged semiconductor devices and packaging methods

Cooling channels in 3DIC stacks

Pillar structure having a non-planar surface for semiconductor devices

Pillar structure having a non-planar surface for semiconductor devices

Pillar structure having a non-planar surface for semiconductor devices

Methods for forming package-on-package structures having buffer dams

MEDIATEK INC

Fan-out package structure and method for forming the same

Semiconductor package assembly with embedded IPD

Semiconductor chip package assembly with improved heat dissipation performance

Semiconductor package assembly with facing active surfaces of first and second semiconductor die and method for forming the same

Semiconductor package structure and method for forming the same

Semiconductor package assembly

IND TECH RES INST

Wafer-leveled chip packaging structure and method thereof

Wafer-leveled chip packaging structure and method thereof

Packaging structure and method of an image sensor module

Packaging structure and method of an image sensor module

CHEN CHIH-HUA

PoP structures including through-assembly via modules

Through-assembly via modules and methods for forming the same

HUANG HON-LIN

Formation of TSV backside interconnects by modifying carrier wafers

Front side copper post joint structure for temporary bond in TSV application

CHUANG YAO-CHUN

T-shaped post for semiconductor devices

Lead free solder interconnections for integrated circuits

HSIAO CHING-WEN

Package structures and methods for forming the same

Semiconductor device with discrete blocks

HU YEN-CHANG

Methods and apparatus for package on package devices with reversed stud bump through via interconnections

LO SUT-I

Package structures including a capacitor and methods of forming the same

KUO TIN-HAO

Pillar structure having a non-planar surface for semiconductor devices

TSAI PEI-CHUN

Connecting function chips to a package to form package-on-package

CHANG WEI SEN

Methods and apparatus for solder on slot connections in package on package structures

TSENG MING-HONG

Three-dimensional integrated circuit stacking-joint interface structure

CHING KAI-MING

Cooling channels in 3DIC stacks

CHEN SHOU-LUNG

Semiconductor package device