Inventor

HURD LINDA L

US84 patents

⚠️ This page may combine multiple inventors who share the name “HURD LINDA L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HURD LINDA L

INTEL CORP

Compute unit having independent data paths

Mixed inference using low and high precision

Instructions having support for floating point and integer data types in the same register

Coordination and increased utilization of graphics processors during inference

Recognition, reidentification and security enhancements using autonomous machines

Autonomous vehicle advanced sensing and response

Compute optimizations for low precision machine learning operations

Compute optimizations for low precision machine learning operations

Compute optimizations for low precision machine learning operations

Efficient sharing and compression expansion of data across processing systems

Hierarchical general register file (GRF) for execution block

Compute optimization mechanism for deep neural networks

Compute optimization mechanism

Current change mitigation policy for limiting voltage droop in graphics logic

Compute optimization mechanism for deep neural networks

Concurrent multi-datatype execution within a processing resource

Hierarchical general register file (GRF) for execution block

Contextual configuration adjuster for graphics

Barriers and synchronization for machine learning at autonomous machines

Compute optimizations for low precision machine learning operations

Compute optimization mechanism for deep neural networks

Compute optimization mechanism

Efficient sharing and compression expansion of data across processing systems

Dynamic precision for neural network compute operations

Neural network optimization mechanism

Contextual configuration adjuster for graphics

Compute optimization mechanism for deep neural networks

Coordination and increased utilization of graphics processors during inference

Contextual configuration adjuster for graphics

Programmable power performance optimization for graphics cores

Micro-architectural energy monitor event-assisted temperature sensing

Recognition, reidentification and security enhancements using autonomous machines

Autonomous vehicle advanced sensing and response

Recognition, reidentification and security enhancements using autonomous machines

System for power throttling

Coordination and increased utilization of graphics processors during inference

Dynamic precision for neural network compute operations

Compute optimization mechanism

Barriers and synchronization for machine learning at autonomous machines

Compute optimization mechanism for deep neural networks

Dynamic precision for neural network compute operations

Coordination and increased utilization of graphics processors during inference

Efficient sharing and compression expansion of data across processing systems

TEXAS INSTRUMENTS INC

Module-configurable full-chip power profiler

Power reduction for multiple-instruction-word processors with proxy NOP instructions

Power saving by disabling memory block access for aligned NOP slots during fetch of multiple instruction words

Power reduction for multiple-instruction-word processors by modification of instruction words

Graphics user interface for power optimization diagnostics

HURD LINDA L

Dynamic graphics geometry preprocessing frequency scaling and prediction of performance gain

APPU ABHISHEK R

Dedicated fixed point blending for energy efficiency