Inventor

JANCZAK TOMASZ

PL35 patents

⚠️ This page may combine multiple inventors who share the name “JANCZAK TOMASZ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JANCZAK TOMASZ

INTEL CORP

Polling in wireless networks

Graphics processor with tiled compute kernels

Resource-specific flushes and invalidations of cache and memory fabric structures

Mapping multi-rate shading to monolithic programs

Systems and method for avoiding duplicative processing during generation of a procedural texture

Graphics with adaptive temporal adjustments

Tile-based immediate mode rendering with early hierarchical-z

Graphics with adaptive temporal adjustments

Graphics processor with tiled compute kernels

Handling surface level coherency without reliance on fencing

Replicating primitives across multiple viewports

Strict priority distributed coordination function in wireless networks

Graphics with adaptive temporal adjustments

Hybrid low power homogenous grapics processing units

Handling surface level coherency without reliance on fencing

Hybrid low power homogenous grapics processing units

Replicating primitives across multiple viewports

Deferred geometry rasterization technology

Resource-specific flushes and invalidations of cache and memory fabric structures

Deferred geometry rasterization technology

Physically based shading via fixed-functionality shader libraries

Tile-based immediate mode rendering with early hierarchical-z

Handling surface level coherency without reliance on fencing

Hybrid low power homogenous grapics processing units

GPU register allocation mechanism

Physically based shading via fixed-functionality shader libraries

Method and apparatus to facilitate shared pointers in a heterogeneous platform

Method and apparatus to facilitate shared pointers in a heterogeneous platform

Apparatus and method for asynchronous texel shading

Combined fast fourier transforms and matrix operations

Serialized access to graphics resources

JANCZAK TOMASZ

Register allocation with SIMD architecture using write masks

Reducing the number of sequential operations in an application to be performed on a shared memory cell

Reducing the number of IO requests to memory when executing a program that iteratively processes contiguous data

NI YANG

Method and apparatus to facilitate shared pointers in a heterogeneous platform