Inventor

CHEN CHUN-KUANG

TW106 patents

⚠️ This page may combine multiple inventors who share the name “CHEN CHUN-KUANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN CHUN-KUANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Method of fabricating semiconductor device with reduced trench distortions

Semiconductor device including source/drain contact having height below gate stack

Power strap structure for high performance and low current density

Dual power structure with connection pins

Method of forming an interconnect structure for a semiconductor device

Semiconductor device including source/drain contact having height below gate stack

Semiconductor device including source/drain contact having height below gate stack

Via rail solution for high power electromigration

Power strap structure for high performance and low current density

Semiconductor device including source/drain contact having height below gate stack

Methods for improved critical dimension uniformity in a semiconductor device fabrication process

Method of controlling reticle masking blade positioning to minimize impact on critical dimension uniformity and device for controlling reticle masking blade positioning

Via rail solution for high power electromigration

Lithographic technique for feature cut by line-end shrink

Layout modification method for exposure manufacturing process

Dual power structure with connection pins

Layout modification method and system

Power strap structure for high performance and low current density

Method of fabricating semiconductor device with reduced trench distortions

Dummy MOL removal for performance enhancement

Method of forming an interconnect structure for a semiconductor device

Lithographic technique incorporating varied pattern materials

Lithographic technique for feature cut by line-end shrink

Method of forming features with various dimensions

Method of patterning a film layer

Lithographic technique for feature cut by line-end shrink

Fin patterning methods for increased process margin

Collector pellicle

Apparatus and method for dispensing developer onto semiconductor substrate

Lithography process and system with enhanced overlay quality

Method to define multiple layer patterns using double exposures

Semiconductor device including source/drain contact having height below gate stack

Via rail solution for high power electromigration

Dummy MOL removal for performance enhancement

Dual power structure with connection pins

Method of fabricating semiconductor device

TAIWAN SEMICONDUCTOR MFG

Apparatus and method for immersion lithography

Double patterning strategy for contact hole and trench

Immersion optical projection system

Method of defining forbidden pitches for a lithography exposure tool

Method and system for improving critical dimension uniformity

CHEN CHUN-KUANG

Downlight

Double patterning strategy for contact hole and trench in photolithography

LEXTAR ELECTRONICS CORP

Integrated wireless and wired light control system

Color temperature and illumination adjusting system, and method thereof

FAR EASTONE TELECOMM CO LTD

Alert system and method for geographic or natural disasters utilizing a telecommunications network

CHANG SHIH-MING

Holographic reticle and patterning method

WEN MING-CHANG

Structure and method for alignment marks

YAO HSIN-CHIEH

Overlay mark assistant feature

GOOEE LTD

Modular light control device and dimming control system