Inventor
PUTTLITZ KARL J
US16 patents
Patents
16 patentsUS5251806AOct 12, 1993
Method of forming dual height solder interconnections
IBM144 citations98
US5130779AJul 14, 1992
Solder mass having conductive encapsulating arrangement
IBM185 citations98
US6212070B1Apr 3, 2001
Zero force heat sink
IBM106 citations95
US5862588AJan 26, 1999
Method for restraining circuit board warp during area array rework
IBM45 citations95
US4604644AAug 5, 1986
Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making
IBM396 citations95
US6179196B1Jan 30, 2001
Apparatus for manufacturing circuit boards
IBM19 citations92
US5284286AFeb 8, 1994
Porous metal block for removing solder or braze from a substate and a process for making the same
IBM31 citations92
US5219520AJun 15, 1993
Process of making a porous metal block for removing solder or braze
IBM24 citations92
US5721299AFeb 24, 1998
Electrically conductive and abrasion/scratch resistant polymeric materials, method of fabrication thereof and uses thereof
IBM46 citations91
US5620132AApr 15, 1997
Apparatus and method for removing meltable material from a substrate
IBM18 citations91
US5458281AOct 17, 1995
Method for removing meltable material from a substrate
IBM25 citations91
US5805430ASep 8, 1998
Zero force heat sink
IBM33 citations90
US6068175AMay 30, 2000
System for replacing a first area array component connected to an interconnect board
IBM11 citations73
US6964885B2Nov 15, 2005
Stress resistant land grid array (LGA) module and method of forming the same
IBM9 citations71
US6703560B2Mar 9, 2004
Stress resistant land grid array (LGA) module and method of forming the same
IBM7 citations71
US4160893AJul 10, 1979
Individual chip joining machine
IBM18 citations68