Inventor
WALTON ERICK G
US25 patents
Patents
25 patentsUS5134460AJul 28, 1992
Aluminum bump, reworkable bump, and titanium nitride structure for tab bonding
IBM265 citations99
US6110832AAug 29, 2000
Method and apparatus for slurry polishing
IBM157 citations98
US5251806AOct 12, 1993
Method of forming dual height solder interconnections
IBM144 citations98
US5130779AJul 14, 1992
Solder mass having conductive encapsulating arrangement
IBM185 citations98
US5766971AJun 16, 1998
Oxide strip that improves planarity
IBM67 citations96
US6605534B1Aug 12, 2003
Selective deposition of a conductive material
IBM57 citations95
US6471845B1Oct 29, 2002
Method of controlling chemical bath composition in a manufacturing environment
IBM63 citations95
US5760674AJun 2, 1998
Fusible links with improved interconnect structure
IBM45 citations95
US5420455AMay 30, 1995
Array fuse damage protection devices and fabrication method
IBM49 citations95
US4840302AJun 20, 1989
Chromium-titanium alloy
IBM86 citations95
US4723978AFeb 9, 1988
Method for a plasma-treated polysiloxane coating
IBM73 citations95
US7207096B2Apr 24, 2007
Method of manufacturing high performance copper inductors with bond pads
IBM23 citations93
US7015580B2Mar 21, 2006
Roughened bonding pad and bonding wire surfaces for low pressure wire bonding
IBM30 citations93
US6409903B1Jun 25, 2002
Multi-step potentiostatic/galvanostatic plating control
IBM59 citations93
US6054339AApr 25, 2000
Fusible links formed on interconnects which are at least twice as long as they are deep
IBM19 citations92
US5876266AMar 2, 1999
Polishing pad with controlled release of desired micro-encapsulated polishing agents
IBM84 citations92
US5523253AJun 4, 1996
Array protection devices and fabrication method
IBM28 citations92
US4981530AJan 1, 1991
Planarizing ladder-type silsesquioxane polymer insulation layer
IBM43 citations92
US4606998AAug 19, 1986
Barrierless high-temperature lift-off process
IBM53 citations92
US5997392ADec 7, 1999
Slurry injection technique for chemical-mechanical polishing
IBM58 citations91
US5286572AFeb 15, 1994
Planarizing ladder-type silsequioxane polymer insulation layer
IBM18 citations73
US5877589AMar 2, 1999
Gas discharge devices including matrix materials with ionizable gas filled sealed cavities
IBM14 citations70
US7052925B2May 30, 2006
Method for manufacturing self-compensating resistors within an integrated circuit
IBM4 citations63
US7678258B2Mar 16, 2010
Void-free damascene copper deposition process and means of monitoring thereof
IBM1 citations51
US7227265B2Jun 5, 2007
Electroplated copper interconnection structure, process for making and electroplating bath
IBM1 citations51